max5259 Maxim Integrated Products, Inc., max5259 Datasheet - Page 13

• Manufacturer Part Number: max5259
• Description: +3v/+5v, Low-power, 8-bit Octal Dacs With Rail-to-rail Output Buffers
• Manufacturer: Maxim Integrated Products, Inc.

The no-operation (NOP) command allows data to be shifted through the MAX5258/MAX5259 shift register without
affecting the input or DAC registers. This is useful in daisy-chaining (see the Daisy-Chaining Devices section). For
this command, the data bits are "Don’t Cares." As an example, three MAX5258s are daisy-chained (A, B, and C), and
devices A and C need to be updated. The 48-bit-wide command would consist of one 16-bit word for device C, fol-
lowed by an NOP instruction for device B and a third 16-bit word with data for device A. At the rising edge of CS,
device B will not change state.
The clear command clears all input and DAC registers and sets all DAC outputs to zero. This command brings the
DAC out of shutdown.
This command sets DOUT to transition at the falling edge of SCLK. The same command also updates all DAC regis-
ters with the contents of their respective input registers, identical to the LDAC command. This is the default mode on
power-up.
Mode 1 sets the serial output DOUT to transition at the rising edge of SCLK. Once this command is issued, DOUT’s
phase is latched and will not change except on power-up or if the specific command to set the phase to falling edge
is issued.
This command also loads all DAC registers with the contents of their respective input registers, and is identical to the
LDAC command.
Shuts down all output buffer amplifiers and voltage references. Output buffers can be individually disabled with the cor-
responding zeros in the data bits (D7-D0). If all data bits are zero, only the power-on reset circuit is active, and the
device draws 10µA (max). There are four ways to bring the device out of shutdown: POR, CLEAR, LOAD SAME DATA,
LOAD INPUT, AND DAC REGISTERS.
(LDAC = X)
(LDAC = X)
(LDAC = X)
(LDAC = X)
(LDAC = X)
A2
A2
A2
A2
A2
1
0
Don’t Care
Don’t Care
Don’t Care
A1
X
A1
A1
A1
A1
X
A0
X
______________________________________________________________________________________
A0
A0
A0
A0
X
C2
+3V/+5V, Low-Power, 8-Bit Octal DAC
0
C2
C2
C2
C2
0
0
0
0
C1
1
C1
C1
C1
C1
0
1
0
1
with Rail-to-Rail Output Buffers
C0
C0
C0
C0
1
C0
0
1
0
1
D7
D7
D7
D7
D7
D6
D6
D6
D6
D6
Set DOUT Phase—SCLK Falling (Mode 0, Default)
D5
D5
D5
D5
D5
Set DOUT Phase—SCLK Rising (Mode 1)
D4
D4
D4
D4
D4
Don’t Care
Don’t Care
8-Bit Data
8-Bit Data
8-Bit Data
D3
D3
D3
D3
D3
D2
D2
D2
D2
No Operation (NOP)
Software Shutdown
D2
D1
D1
D1
D1
D1
Clear
D0
D0
D0
D0
D0
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