ad1881a Analog Devices, Inc., ad1881a Datasheet

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ad1881a

Manufacturer Part Number
ad1881a
Description
Ac?97 Soundmax Codec
Manufacturer
Analog Devices, Inc.
Datasheet

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a
SoundMAX is a registered trademark and PHAT is a trademark of Analog Device, Inc.
LNLVL_OUT_R
LNLVL_OUT_L
LINE_OUT_R
LINE_OUT_L
MONO_OUT
PHONE_IN
PC_BEEP
LINE_IN
VIDEO
MIC1
MIC2
AUX
CD
MV
MV
MV
0dB/
20dB
M
D
A
AD1881A
POP
POP
STEREO
STEREO
FUNCTIONAL BLOCK DIAGRAM
PHAT
PHAT
M
M
G
A
A
CS0
G = GAIN
A = ATTENUATE
M = MUTE
MV = MASTER VOLUME
NC = NO CONNECT
G
A
M
MODE/SYNCHRONIZER
CS1
G
A
M
M
G
A
EAPD
M
G
A
G
A
M
MODE
AC’97 SoundMAX
NC
NC
G
A
M
G
A
M
PGA
PGA
GENERATORS
CONVERTER
CONVERTER
CONVERTER
CONVERTER
SAMPLE
16-BIT
16-BIT
16-BIT
16-BIT
RATE
A/D
A/D
D/A
D/A
XTL_OUT
OSCILLATORS
XTL_IN
AD1881A
®
SYNC
BIT_CLK
RESET
SDATA_OUT
SDATA_IN
Codec

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ad1881a Summary of contents

Page 1

... POP PHAT STEREO PHAT STEREO POP GAIN ATTENUATE M = MUTE MV = MASTER VOLUME CONNECT AC’97 SoundMAX ® AD1881A MODE 16-BIT A/D PGA CONVERTER 16-BIT RESET A/D PGA CONVERTER SYNC SAMPLE RATE BIT_CLK G GENERATORS A M SDATA_OUT G 16-BIT A D/A SDATA_IN ...

Page 2

... AD1881A–SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature 25 Digital Supply (V ) 3.3 DD Analog Supply (V ) 5.0 CC Sample Rate ( Input Signal 1008 ANALOG INPUT Parameter Input Voltage (RMS Values Assume Sine Wave Input) LINE_IN, AUX, CD, VIDEO, PHONE_IN, PC_BEEP MIC with +20 dB Gain (M20 = 1) ...

Page 3

... REF_OUT Mute Click (Muted Output Minus Unmuted Midscale DAC Output) Guaranteed, not tested. Specifications subject to change without notice. Min 0 0.4 × 0.6 × –74 Min Min to 20 kHz) S Min 10 2.0 AD1881A Typ Max Unit 0.4 × ± 0.09 dB 0.6 × ∞ 12/F sec S µ ...

Page 4

... AD1881A–SPECIFICATIONS STATIC DIGITAL SPECIFICATIONS Parameter High Level Input Voltage (V ): Digital Inputs IH Low Level Input Voltage ( High Level Output Voltage ( Low Level Output Voltage ( +0 Input Leakage Current Output Leakage Current POWER SUPPLY Parameter Power Supply Range – Analog Power Supply Range – ...

Page 5

... Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT) Rising Edge of RESET to HI-Z Delay (ATE Test Mode) Propagation Delay RESET Rise Time NOTES 1 Guaranteed, not tested. 2 Output jitter is directly dependent on crystal input jitter. Specifications subject to change without notice. AD1881A Symbol Min Typ Max t 50 RST_LOW t 833 ...

Page 6

... AD1881A t RST_LOW t RST2CLK RESET BIT_CLK t t SYNC_HIGH RST2CLK SYNC BIT_CLK t CLK_LOW BIT_CLK t CLK_HIGH t CLK_PERIOD t SYNC_LOW SYNC t SYNC_HIGH t SYNC_PERIOD t SETUP BIT_CLK SYNC SDATA_OUT t HOLD BIT_CLK t t RISECLK FALLCLK SYNC t t RISESYNC FALLSYNC SDATA_IN t t RISEDIN FALLDIN SDATA_OUT t t RISEDOUT FALLDOUT SLOT 1 SLOT 2 ...

Page 7

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1881A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 8

... BIT_CLK 6 SDATA_IN 8 SYNC 10 RESET 11 Miscellaneous Connections Pin Name LQFP CS0 45 CS1 46 EAPD 47 MODE 48 Analog I/O These signals connect the AD1881A component to analog sources and sinks, including microphones and speakers. Pin Name LQFP PC_BEEP 12 PHONE_IN 13 AUX_L 14 AUX_R 15 VIDEO_L 16 VIDEO_R 17 CD_L 18 CD_GND_REF 19 CD_ R 20 ...

Page 9

... RAV M 0x0C M 0x0E M 0x10 M 0x16 M 0x12 PHM MCM PHAT 0x20 PHAT 0x20 M 0x0A PCM G = GAIN A = ATTENUATE M = MUTE A 0x0A MV = MASTER VOLUME PCV AD1881A AD1881A LS/RS (0) LS (4) RS (4) GM 0x1C LIM LS (3) 16-BIT LIM IM A (2) ...

Page 10

... AD1881A PRODUCT OVERVIEW The AD1881A meets the Audio Codec ’97 2.0 and 2.1 Extensions. In addition, the AD1881A SoundMAX Codec is designed to meet all requirements of the Audio Codec ’97, Component Specification, Revi- sion 1.03, © 1996, Intel Corporation, found at www.Intel.com. The AD1881A also includes some other Codec enhanced fea- tures such as the built-in PHAT Stereo 3D enhancement ...

Page 11

... X X DAM DMS DLSR X ALSR MOD SRX REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 AD1881A ID6 ID5 ID4 ID3 ID2 ID1 ID0 X RMV5 RMV4 RMV3 RMV2 RMV1 RMV0 8000h ...

Page 12

... Note: Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration). Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement. ID[9:0] Identify Capability. The ID decodes the capabilities of AD1881A based on the following: Bit = 1 ID0 ...

Page 13

... AD1881A ...

Page 14

... AD1881A CD Volume (Index 12h ...

Page 15

... xIM3 . . . xIM0 Function 0 1111 +22.5 dB Gain 0 0000 0 dB Gain ∞ 1 xxxxx – dB Gain AD1881A ...

Page 16

... AD1881A General Purpose Register (Index 20h ...

Page 17

... Note: The ready bits are read only, writing to REF, ANL, DAC, ADC will have no effect. These bits indicate the status for the AD1881A subsections. If the bit is a one, then that subsection is “ready.” Ready is defined as the subsection able to perform in its nominal state. ...

Page 18

... DRQEN and DxRQx are retained only for compatibility with the AD1819. New controller designs should use the VRA bit in register 2Ah and the request bits in the status address slot instead. If your system uses only a single AD1881A, you can ignore the register mask and the slave 1/slave 2 request bits. If you write to this register, write ones to all of the register mask bits. ...

Page 19

... AD1881A ...

Page 20

... REV[7:0] Revision Register field. These bits are read-only and should be verified before accessing vendor defined features. AD1881A/AD1881 USER VISIBLE DIFFERENCES • Pin 48 is now MODE pin, no longer CHAIN_CLK. • AD1881 chaining mode not supported. • LSB of register 7Eh is 48h instead of 40h. ...

Page 21

... APPLICATIONS CIRCUITS The AD1881A has been designed to require a minimum amount of external circuitry. The recommended applications circuits are shown in Figure 9. Reference designs for the AD1881A are available and may be obtained by contacting your local Analog Devices’ sales representative or authorized distributor 100nF ...

Page 22

... J1 MICROPHONE CONNECTIONS The AD1881A contains an internal microphone preamp with 20 dB gain, in most cases a direct microphone connection as shown in Figure 12 is adequate. If the microphone level is too low, an external preamp can be added as shown in Figure 13. In either case the microphone bias can be derived from the Codec’s internal reference (V V signal can also provide the mid-point bias for the amplifier ...

Page 23

... J1 USING AN EXTERNAL HEADPHONE/POWER AMP The SSM2250 Power Amplifier is an ideal companion for the AD1881A. The amplifier can provide up to 250 mW output in stereo mode and up to 1.5 W into a mono speaker connected in a bridge-tied load (BTL) configuration. The SM2250 has a mode control pin that can be used to switch between the stereo output mode and the mono BTL speaker. ...

Page 24

... LEFT OUT/BLT SHUTDOWN VDO SE/BTL BTL+ BYPASS R6 GND RIGHT OUT RIGHT CONNECT R7 49.9k DIGITAL GROUND PLANE CONNECT SPLIT GROUND PLANES AT OR NEAR CODEC. PIN 1 AD1881A TRENCH GROUND PLANE 5AV DD R1 100k STEREO C2 HP/SPEAKER 100 F F1 OUTPUT 470pF 600Z ...

Page 25

... If a power plane layer is being used in the system design recommended that the analog power plane for the Codec also be split (mirroring the analog ground plane). In this case, the analog power supply ferrite bead should bridge the isolation trench, close to the Codec location. U1 LM78M05CP 3 IN OUT AD1881A L1 5AV DD 600Z + ...

Page 26

... AD1881A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead Thin Plastic Quad Flatpack (LQFP) (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC 0.057 (1.45) 0.030 (0.75) 0.276 (7.0) BSC 0.030 (0.75) 0.018 (0.45) 0.053 (1.35) 0.018 (0.45 SEATING PLANE TOP VIEW (PINS DOWN) 0.006 (0.15 0.002 (0.05) 0° MIN 0° – 7° 0.007 (0.18) ...

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