tda8031hl-c107 NXP Semiconductors, tda8031hl-c107 Datasheet - Page 14

• Manufacturer Part Number: tda8031hl-c107
• Description: Usb Smart Card Reader Otp Or Rom
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.1.2
The TDA8030; TDA8031 has 1 analog interface for
7 contacts cards. The data to and from the cards is fed into
an ISO UART.
The Card Select Register (CSR) contains one bit for
resetting the ISO UART (RIU, active LOW). This bit is reset
after power-on and must be set HIGH before starting any
operation. It may be reset by software when necessary.
The following dedicated registers enable the parameters
of the ISO UART and the ETU counters to be set:
There is also a dedicated Power Control Register (PCR)
for controlling the power to the card.
When the specific parameters of the card have been
programmed, the UART may be used with the following
registers:
In the reception mode, a FIFO of 1 to 8 characters may be
used and is configured with the FIFO Control Register
(FCR). This register may also be used for programming an
automatic repetition of NAKed characters in the
transmission mode.
Table 1 Card select register (address 00H; write and read); note 1
Note
1. All bits are cleared after reset.
2003 Jul 04
Programmable Divider Register (PDR)
Guard Time Register (GTR)
Two UART Control Registers (UCR1 and UCR2)
Clock Configuration Register (CCR)
Time-Out Configuration Register (TOCR)
Three Time-Out Registers (TOR1, TOR2 and TOR3).
UART Receive Register (URR)
UART Transmit Register (UTR)
UART Status Register (USR)
Mixed Status Register (MSR).
USB smart card reader (OTP or ROM)
7
C
ONTROL REGISTERS
6
5
4
14
The Hardware Status Register (HSR) gives the status of
the supply voltage, of the hardware protections and of the
card movements.
The USR and HSR give interrupts on pins INT when some
of their bits have been changed.
The MSR does not give interrupts and may be used in the
polling mode for some operations; when this is the case,
the bit Transmit Buffer Empty/Receive Buffer Full
(TBE/RBF) within the USR may be masked.
A 24-bit time-out counter may be started to provide an
interrupt after a number of ETUs programmed in time-out
registers TOR1, TOR2 and TOR3. This will help the
microcontroller when processing different real-time tasks
(ATR, WWT and BWT etc.), mainly if the microcontrollers
and cards clock are asynchronous.
This counter is configured with a Time-Out Counter
Configuration register (TOCC) and may be used as a
24-bit or as a 16 + 8-bit counter. Each counter may be set
to start counting once data has been written, or on
detection of a start bit on the I/O or as autoreload.
8.1.3
8.1.3.1
The Card Select Register (CSR) is used for resetting the
ISO UART.
The bit Reset ISO UART (RIU) must be set to logic 1 by
software before any action on the UART. When set to
logic 0, this bit resets a large part of the UART registers to
their default value; see Table 1. A minimum pulse of 10 ns
is needed on RIU. This bit must be reset before any new
activation.
RIU
3
G
ENERAL REGISTERS
Card select register
2
TDA8030; TDA8031
1
Product specification
0