uda1320ats NXP Semiconductors, uda1320ats Datasheet

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uda1320ats

Manufacturer Part Number
uda1320ats
Description
Low-cost Stereo Filter Dac
Manufacturer
NXP Semiconductors
Datasheet

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Preliminary specification
Supersedes data of 1999 Oct 11
File under Integrated Circuits, IC01
DATA SHEET
UDA1320ATS
Low-cost stereo filter DAC
INTEGRATED CIRCUITS
2000 Jan 10

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uda1320ats Summary of contents

Page 1

... DATA SHEET UDA1320ATS Low-cost stereo filter DAC Preliminary specification Supersedes data of 1999 Oct 11 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2000 Jan 10 ...

Page 2

... Data transfer mode 9.3 Programming the features 10 LIMITING VALUES 11 HANDLING 12 QUALITY SPECIFICATION 13 THERMAL CHARACTERISTICS 14 DC CHARACTERISTICS 15 AC CHARACTERISTICS 15.1 Analog 15.2 Digital 16 APPLICATION INFORMATION 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction 18.2 Reflow soldering 18.3 Wave soldering 18.4 Repairing soldered joints 19 DEFINITIONS 20 LIFE SUPPORT APPLICATIONS 2000 Jan 10 2 Preliminary specification UDA1320ATS ...

Page 3

... LSB-justified serial data format with word lengths of 16, 18 and 20 bits. The UDA1320ATS/N2 can be used in two modes, either L3-mode or static pin mode. In the L3-mode, all digital sound processing features must be controlled via the L3 interface, including the selection of ...

Page 4

... V O(L) 2000 Jan 10 CONDITIONS note dB; A-weighted code = 0; A-weighted V DDD 4 DIGITAL INTERFACE VOLUME/MUTE/DE-EMPHASIS INTERPOLATION FILTER NOISE SHAPER DAC DDA V SSA Fig.1 Block diagram. 4 Preliminary specification UDA1320ATS MIN. TYP. 2.7 3.3 2.7 3.3 6.5 3 100 100 40 V SSD 5 7 APPSEL 11 APPL0 ...

Page 5

... Fig.2 Pin configuration. 2000 Jan 10 8 FUNCTIONAL DESCRIPTION 8.1 The UDA1320ATS/N2 operates in slave mode only. This means in all applications the system devices must provide the system clock. The system frequency is selectable and depends on the mode of operation. The options are 256f and 256f ...

Page 6

... WS both L3 and static mode. 8.5 Pin compatibility In L3 interface mode the UDA1320ATS/N2 can be used on boards that are designed for the UDA1322. The software for UDA1322 can be used for the UDA1320ATS/N2 to control de-emphasis, volume control and mute and also the status settings like system clock setting and input data format ...

Page 7

Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATAI MSB B2 WS LEFT ...

Page 8

... UDA1320ATS/N2 to program sound processing and other functional features. Data bits represent a 6-bit device address, bit 7 being the MSB. The address of the UDA1320ATS/N2 is 000101 (bit 7 to bit 2). If the UDA1320ATS/N2 receives a different address, it will deselect its microcontroller interface logic. 9.2 ...

Page 9

... The second selection is performed by the 2 MSBs of the data byte (bit 7 and bit 6). The other bits in the data byte (bit 5 to bit 0) is the value that is placed in the selected registers. 9 Preliminary specification UDA1320ATS address MBK074 t stp(L3) t h(L3)D t h(L3)DA BIT 7 ...

Page 10

... De-emphasis: a 2-bit value to enable the digital de-emphasis filter. Table 10 De-emphasis settings FUNCTION Mute: a 1-bit value to enable the digital mute. Table 11 Mute setting 10 Preliminary specification UDA1320ATS REGISTER SELECTED REGISTER SELECTED dB in steps of 1 dB. VC4 VC3 VC2 VC1 VC0 VOLUME (dB) ...

Page 11

... Handbook” . The handbook can be ordered using the code 9397 750 00192. 13 THERMAL CHARACTERISTICS SYMBOL R thermal resistance from junction to ambient th(j-a) 2000 Jan 10 CONDITIONS note 1 note 1 note 2 note 3 PARAMETER 11 Preliminary specification UDA1320ATS MIN. MAX. 5.0 5.0 150 65 +125 40 +85 3000 +3000 300 +300 CONDITIONS ...

Page 12

... All voltages referenced to ground (pins 5 and 15) unless otherwise L CONDITIONS note 1 2.7 note 1 2.7 operation mode operation mode 0.8V with respect to V 0.45V SSA (THD + N)/S < 0. note 2 12 Preliminary specification UDA1320ATS MIN TYP. MAX 3.3 3.6 3.3 3.6 6.5 3.0 DDD 0.2V DDD 0.5 V DDD 0.5 0.5V 0.55V DDA ...

Page 13

... Jan All voltages referenced to ground (pins 5 and 15) unless amb L CONDITIONS dB; A-weighted code = 0; A-weighted kHz; ripple V = 100 mV ripple(p-p) 13 Preliminary specification UDA1320ATS MIN. TYP. MAX. UNIT 1 -35 dB 100 95 dB 100 ...

Page 14

... MHz sys f < 19.2 MHz sys f 19.2 MHz sys addressing mode addressing mode data transfer mode data transfer mode data transfer and addressing mode data transfer and addressing mode 14 Preliminary specification UDA1320ATS MIN. TYP 300 100 ...

Page 15

... 100 nF 100 nF ( SSA V DDA V SSD UDA1320A Fig.8 Application schematic. 15 Preliminary specification UDA1320ATS t su(i)( DDD 100 ( O(R) R6 100 ( REF(DAC) 12 ...

Page 16

... IEC SOT369-1 2000 Jan 2.5 scale (1) ( 0.32 0.25 5.30 4.5 6.6 0.65 0.20 0.13 5.10 4.3 6.2 REFERENCES JEDEC EIAJ MO-152 16 Preliminary specification UDA1320ATS detail 0.75 0.65 1.0 0.2 0.13 0.45 0.45 EUROPEAN PROJECTION SOT369 ( 0.48 10 ...

Page 17

... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 17 Preliminary specification UDA1320ATS ...

Page 18

... Philips for any damages resulting from such improper use or sale. 2000 Jan 10 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 18 Preliminary specification UDA1320ATS (1) REFLOW suitable suitable suitable suitable suitable ...

Page 19

... Philips Semiconductors Low-cost stereo filter DAC 2000 Jan 10 NOTES 19 Preliminary specification UDA1320ATS ...

Page 20

Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...

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