adv7123-ep

Manufacturer Part Numberadv7123-ep
DescriptionCmos, 170 Mhz, Triple, 10-bit High Speed Video Dac Adv7123-ep
ManufacturerAnalog Devices, Inc.
adv7123-ep datasheet
 
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FEATURES
170 MSPS throughput rate
Triple, 10-bit digital-to-analog converters (DACs)
SFDR
−70 dB at f
= 50 MHz; f
= 1 MHz
CLK
OUT
−53 dB at f
= 140 MHz; f
= 40 MHz
CLK
OUT
RS-343A-/RS-170-compatible output
Complementary outputs
DAC output current range: 2.0 mA to 26.5 mA
TTL-compatible inputs
Internal reference: 1.235 V
Single-supply 3.3 V operation
48-lead LFCSP package
Low power dissipation: 30 mW minimum at 3 V
Low power standby mode: 6 mW typical at 3 V
Supports defense and aerospace applications
(AQEC standard)
Military temperature range: −55°C to +105°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Digital video systems
High resolution color graphics
Digital radio modulation
Image processing
Instrumentation
Video signal reconstruction
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
CMOS, 170 MHz, Triple, 10-Bit
High Speed Video DAC
ADV7123-EP
FUNCTIONAL BLOCK DIAGRAM
V
AA
BLANK
SYNC
DATA
R9 TO R0
10
10
DAC
REGISTER
DATA
G9 TO G0
10
10
DAC
REGISTER
DATA
B9 TO B0
10
10
DAC
REGISTER
POWER-DOWN
PSAVE
MODE
REFERENCE
CLOCK
GND
R
COMP
SET
Figure 1.
GENERAL DESCRIPTION
The ADV7123-EP is a triple, high speed digital-to-analog
converter (DAC) on a single monolithic chip. It consists of three
high speed, 10-bit video DACs with complementary outputs,
a standard TTL input interface, and a high impedance, analog
output current source.
The ADV7123-EP has three separate 10-bit-wide input ports.
A single 3.3 V power supply and clock are the only components
required to make the part functional. The ADV7123-EP has
additional video control signals: composite SYNC and BLANK .
The ADV7123-EP also has a power save mode.
The ADV7123-EP is fabricated in a 5 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with lower power dissipation. The ADV7123-EP is available
in a 48-lead LFCSP package.
Full details about this enhanced product are available in the
ADV7123
data sheet, which should be consulted in conjunction
with this data sheet.
PRODUCT HIGHLIGHTS
1.
Guaranteed monotonic to 10 bits.
2.
Compatible with a wide variety of high resolution color
graphics systems, including RS-343A and RS-170.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
BLANK AND
SYNC LOGIC
IOR
IOR
IOG
IOG
IOB
IOB
VOLTAGE
V
REF
CIRCUIT
ADV7123-EP
www.analog.com

adv7123-ep Summary of contents

  • Page 1

    ... The ADV7123-EP has additional video control signals: composite SYNC and BLANK . The ADV7123-EP also has a power save mode. The ADV7123-EP is fabricated CMOS process. Its monolithic CMOS construction ensures greater functionality with lower power dissipation. The ADV7123-EP is available in a 48-lead LFCSP package ...

  • Page 2

    ... ADV7123-EP TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Dynamic Specifications ............................................................... 4 REVISION HISTORY 7/10—Revision 0: Initial Version   Timing Specifications ...................................................................5   Absolute Maximum Ratings ............................................................7   ESD Caution...................................................................................7   Pin Configuration and Function Descriptions ..............................8   Outline Dimensions ....................................................................... 10   ...

  • Page 3

    ... K × (0x3FFH) and K = 7.9896. REF SET Rev Page ADV7123- unless otherwise noted; T MIN MAX Unit Test Conditions/Comments Bits R = 680 Ω SET LSB R = 680 Ω SET LSB R = 680 Ω SET V V μ 0 ...

  • Page 4

    ... ADV7123-EP DYNAMIC SPECIFICATIONS 1.235 REF SET Table 2. Parameter 1 AC LINEARITY Spurious-Free Dynamic Range to Nyquist Single-Ended Output MHz 1.00 MHz CLK OUT MHz 2.51 MHz CLK OUT MHz 5.04 MHz CLK OUT MHz 20.2 MHz CLK OUT f = 100 MHz ...

  • Page 5

    ... These maximum/minimum specifications are guaranteed by characterization over the 3 3.6 V range. 2 The ADV7123-EP exhibits high performance when operating with an internal voltage reference DAC-to-DAC crosstalk is measured by holding one DAC high while the other two DACs are making low-to-high and high-to-low transitions. ...

  • Page 6

    ... ADV7123-EP CLOCK DIGITAL INPUTS ( B0, SYNC, BLANK) ANALOG INPUTS (IOR, IOR, IOG, IOG, IOB, IOB) NOTES t 1. OUTPUT DELAY ( ) MEASURED FROM THE 50% POINT OF THE RISING EDGE OF CLOCK TO THE 50% POINT 6 OF FULL-SCALE TRANSITION OUTPUT RISE/FALL TIME ( ) MEASURED BETWEEN THE 10% AND 90% POINTS OF FULL-SCALE TRANSITION. ...

  • Page 7

    ... GND − section of this specification is not implied. Exposure to absolute −55°C to +105°C maximum rating conditions for extended periods may affect −65°C to +150°C device reliability. 150°C 300°C 220°C ESD CAUTION Rev Page ADV7123-EP ...

  • Page 8

    ... Compensation Pin for the Internal Reference Amplifier. A 0.1 μF ceramic capacitor must be connected between COMP and Voltage Reference Input for DACs or Voltage Reference Output (1.235 V). The V REF to V through a 0.1 μF capacitor. However, the ADV7123-EP can be overdriven by an external 1.23 V reference AA (AD1580), if required PIN 1 G1 ...

  • Page 9

    ... The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC is tied permanently low. 38 PSAVE Power Save Control Pin. Reduced power consumption is available on the ADV7123-EP when this pin is active. EP Exposed Pad The exposed paddle on the underside of the package must be soldered to the ground plane to increase the reliability of the solder joints and to maximize the thermal capability of the package ...

  • Page 10

    ... ADV7123-EP OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADV7123SCP170EP-RL −55°C to +105°C 1 Available in 3.3 V version only. 7.00 0.30 BSC SQ 0.23 0. 0.50 BSC EXPOSED PAD 25 24 0.45 TOP VIEW BOTTOM VIEW 0.40 0.35 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WKKD. Figure 4. 48-Lead Lead Frame Chip Scale Package [LFCSP_WQ × ...

  • Page 11

    ... NOTES Rev Page ADV7123-EP ...

  • Page 12

    ... ADV7123-EP NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09200-0-7/10(0) Rev Page ...