atf1502be ATMEL Corporation, atf1502be Datasheet

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... Advanced Digital CMOS Technology – 100% Tested – Completely Reprogrammable – 10,000 Program/Erase Cycles – 10-year Data Retention – 2000V ESD Protection – 200 mA Latch-up Immunity • Security Fuse Feature • Hot-Socketing Supported High- performance CPLD ATF1502BE Rev. 3492A–PLD–12/05 ...

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... The ATF1502BE’s enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications. The ATF1502BE has bi-directional I/O pins and four dedicated input pins, depending on the type of device package selected. Each dedicated pin can also serve as a global control sig- nal, register clock, register reset or output enable ...

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... The User Signature is accessible regardless of the state of the security fuse. The ATF1502BE device is an In-System Programming (ISP) device. It uses the industry-stan- dard 4-pin JTAG interface (IEEE Std. 1149.1), and is fully compliant with JTAG’s Boundary-scan Description Language (BSDL). ISP allows the device to be programmed without removing it from the printed circuit board ...

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... OR/XOR/CASCADE Logic The ATF1502BE’s logic structure is designed to efficiently support all types of logic. Within a sin- gle macrocell, all the product terms can be routed to the OR gate, creating a 5-input AND/OR sum term. With the addition of the CASIN from neighboring macrocells, this can be expanded to as many as 40 product terms with minimal additional delay. The macrocell’ ...

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... Flip-flop The ATF1502BE’s flip-flop has very flexible data and control functions. The data input can come from either the XOR gate, from a separate product term or directly from the I/O pin. Selecting the separate product term allows creation of a buried registered feedback within a combinatorial out- put macrocell ...

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... Programmable Pin-keeper Option for Inputs and I/Os The ATF1502BE offers the option of programming each of its input or I/O pin so that pin-keeper circuit can be utilized. When any pin is driven high or low and then subsequently left floating, it will stay at that previous high or low level. This circuitry prevents unused input and I/O lines from floating to intermediate voltage levels, which causes unnecessary power consumption and sys- tem noise ...

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... Security Feature A fuse is provided to prevent unauthorized copying of the ATF1502BE fuse patterns. Once pro- grammed, fuse verify is inhibited. However, the 16-bit User Signature remains accessible. To reset this feature, the entire memory array in the device must be erased. ...

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... PLD for functional mode. When the device is in the ISC programming mode, all user I/Os are held in the high impedance state. The ISC mode is best suited for working with the ATF1502BE device in a design development or production environment. Configuration of the ATF1502BE device done via a Download Cable ...

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... ISP Programming Protection The ATF1502BE has a special feature that locks the device and prevents the inputs and I/O from driving if the programming process is interrupted for any reason. The inputs and I/O default to high-Z state during such a condition. ...

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... JTAG Boundary-scan Cell (BSC) Testing The ATF1502BE contains 32 I/O pins and four input pins. Each input pin and I/O pin has its own boundary-scan cell (BSC) in order to support boundary-scan testing as described in detail by IEEE Standard 1149.1. A typical BSC consists of three capture registers or scan registers and up to two update registers ...

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... Mentor Graphics tools. 3492A–PLD–12/05 BSC Configuration for Input and I/O Pins (Except JTAG TAP Pins) The ATF1502BE has a pull-up option on TMS and TDI pins. This feature is selected as a design option. BSC Configuration for Macrocell TDO ...

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... Table 8-3. Pin Capacitance Typ I/O Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. ATF1502BE 12 *NOTICE: ) ........ –0.5V to +4.5V Max Units Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device ...

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... V = 2.3V OL CCIO HD mA 2.3V OH CCIO LD mA 2.3V OH CCIO HD mA 1.7V OL CCIO LD mA 1.7V OL CCIO HD mA 1.7V OH CCIO LD mA 1.7V OH CCIO VCCINT = 1.8V, VCCIO = 3.3V MHz ATF1502BE Min Typ Max 1.7 1.8 1.9 3.0 3.3 3.6 2.3 2.5 2.7 1.7 1.8 1 ±1 ±1 -0.3 0.8 2 3.9 0.4 0 0.4V CCIO V - 0.4V CCIO -0.3 0.7 1.7 3.9 ...

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... Timing Model Input Delay t IN Switch Matrix t UIM 10. Output AC Test Loads LVTTL LVCMOS33 LVCMOS25 LVCMOS18 Note: ATF1502BE 14 Internal Output Enable Delay t IOE Global Control Delay t GLOB Cascade Logic Delay Logic Array t Delay PEXP t LAD Register Control Delay Fast Input Delay ...

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... OD1 (High Drive pF) L Output Buffer Enable Delay t ZX1 (High Drive 1.8V; C CCIO Output Buffer Enable Delay t ZX2 (High Drive 3.3V; C CCIO 3492A–PLD–12/05 ( 1.8V CCIO V = 3.3V CCIO = 35 pF pF) L ATF1502BE -5 -7 Min Max Min Max 5.0 5.75 7 7.5 4.5 6 2.5 3 0.5 0. 1.25 2.15 1.25 2.15 1.5 2 ...

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... Output Buffer and Pad Delay t OD3 (Slow slew rate = ON) t Schmitt Added Delay SCH Output Buffer Pad Added Delay for t SSO V = 1.8V with output Low Drive CCIO Note: 1. See ordering information for valid part numbers. ATF1502BE 16 (1) Min V = 1.8V CCIO V = 3.3V CCIO = 5 pF 1.8V CCIO ...

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... Power-down Mode The ATF1502BE includes an optional pin-controlled power-down feature. When this mode is enabled, the PD pin acts as the power-down pin. When the PD pin is high, the device supply cur- rent is reduced to less than 100 µA. During power-down, all output data and internal logic states are latched and held ...

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... ATF1502BE Dedicated Pinouts Table 13-1. Dedicated Pin INPUT/OE2/GCLK2 INPUT/GCLR INPUT/OE1 INPUT/GCLK1 I/O / GCLK3 I (1,2) I/O / TDI (JTAG) I/O / TMS (JTAG) I/O / TCK (JTAG) I/O / TDO (JTAG) GND VCCINT VCCIOA VCCIOB # of Signal Pins # User I/O Pins OE (1, 2) GCLR GCLK ( (1, 2) TDI, TMS, TCK, TDO GND VCCINT VCCIOA VCCIOB ...

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... Table 13-2. 3492A–PLD–12/05 ATF1502BE I/O Pinouts MC Logic Block 4/TDI (PD1) 8 9/TMS 20/TDO 25/TCK (PD2) 32 ATF1502BE 44-lead TQFP ...

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... CCIO 180.0 160.0 140.0 120.0 100.0 80.0 60.0 40.0 20.0 0.0 0.05 0.1 0.2 0.5 0.6 1 OUTPUT VOLTAGE (mV) OUTPUT SINK CURRENT (I ) VS. OUTPUT VOLTAGE (HIGH DRIVE 1.8V 1.8V (T CCINT CCIO 70.0 60.0 50.0 40.0 30.0 20.0 10.0 0.0 0.05 0.1 0.2 0.3 0.4 OUTPUT VOLTAGE (mV) ATF1502BE 20 = 25°C) A 20.0 18.0 16.0 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0 83.3 100 OUTPUT SOURCE CURRENT (I = 25°C) A 0.0 -20.0 -40.0 -60.0 -80.0 -100.0 -120.0 1.5 2 2.5 2.5 3 3.3 OUTPUT SOURCE CURRENT (I = 25°C) A 0.0 -5 ...

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... A 0.0 -20.0 -40.0 -60.0 -80.0 -100.0 -120.0 -140.0 -160.0 1.5 2 2.5 3 3.3 = 25° PDI_INP 16 32 ATF1502BE INPUT & I/O CURRENT VS. INPUT VOLTAGE V = 1.8V 1. 25°C) CCINT CCIO A (Pull-Up On) 0 0.5 1 INPUT VOLTAGE (V) I/O CURRENT VS. INPUT VOLTAGE V = 1.8V 3. 25°C) CCINT CCIO A (Pull-Up On) 0 0.5 1 1.5 2 INPUT VOLTAGE (V) TPD VS. MACROCELL SWITCHING ...

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... Lead-free Package Options (RoHS Compliant (ns) (ns) Ordering Code 5 6 ATF1502BE-5AX44 7 7 ATF1502BE-7AU44 44A 44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP) ATF1502BE 22 Package 44A 44A Package Type Operation Range Commercial (0°C to +70°C) Industrial (-40°C to +85°C) 3492A–PLD–12/05 ...

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... Orchard Parkway San Jose, CA 95131 R 3492A–PLD–12/05 B PIN 1 IDENTIFIER TITLE 44A, 44-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATF1502BE A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM SYMBOL A – – A1 0.05 – ...

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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life © Atmel Corporation 2005. All rights reserved. Atmel registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Mentor Graphics ® Corporation. Verilog is the registered trademarks of Cadence Design Systems, Inc ...