atf750lvc ATMEL Corporation, atf750lvc Datasheet
atf750lvc
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atf750lvc Summary of contents
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... I/O GND * I/O GND High-speed Complex Programmable Logic Device ATF750LVC 10 I/O PINS (continued) PLCC GND * I/O Rev. 1447E–02/06 1 ...
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... ATF750LVC is a high-performance CMOS (electrically- erasable) complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. Each of the ATF750LVC’s 22 logic pins can be used as an input. Ten of these can be used as inputs, outputs or bi- directional I/O pins. Each flip-flop is individually config- urable as either D- or T-type ...
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... Clock Mux Output Options Bus-friendly Pin-keeper Input and I/Os All input and I/O pins on the ATF750LVC(L) have program- mable “pin-keeper” circuits. If activated, when any pin is driven high or low and then subsequently left floating, it will stay at that previous high or low level. This circuitry prevents unused input and I/O lines from floating to intermediate voltage levels, which cause unnec- essary power consumption and system noise ...
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... Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec. 2. This test is performed at initial characterisation only. Input Test Waveforms and Measurement Levels < (10 ATF750LVC 4 = -0. -0. 0. Max, Com. ...
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AC Waveforms, Product Term Clock Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified. AC Characteristics, Product Term Clock Symbol Parameter t Input or Feedback to Non-registered Output PD t Input ...
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... Clock Width WS External Feedback 1/( Internal Feedback 1/(t MAXS SFS No Feedback 1/( Asynchronous Reset Width AW t Asynchronous Reset Recovery Time ARS t Asynchronous Reset to Registered Output Reset AP t Setup Time, Synchronous Preset SPS ATF750LVC 6 ( COS + t ) CFS -15 Min Max Units ...
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... Functional Logic Diagram ATF750LVC, Upper Half 7 ...
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... Functional Logic Diagram ATF750LVC, Lower Half ATF750LVC 8 ...
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... Each register has its own sum term, its own reset term and its own clock term. • Independent I/O Pin and Feedback Paths Each I/O pin on the ATF750LVC has a dedicated input path. Each of the 20 registers has its own feedback terms into the array as well. This feature, combined with individual product terms for each I/O’ ...
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... OUTPUT SOURCE CURRENT VS SUPPLY VOLTAGE (V 0.0 -1.0 -2.0 -3.0 -4.0 -5.0 -6.0 -7.0 -8.0 3.00 3.25 3.30 SUPPLY VOLTAGE (V) INPUT CURRENT VS INPUT VOLTAGE (V = 3.3V 15.0 10.0 5.0 0.0 -5.0 -10.0 0.0 0.5 1.0 1.5 2.0 INPUT VOLTAGE (V) SUPPLY CURRENT VS SUPPLY VOLTAGE (T 70.0 60.0 50.0 40.0 30.0 3.0 3.3 SUPPLY VOLTAGE (V) ATF750LVC 10 = 2.4V 25° 24.0 23.0 22.0 21.0 20.0 19.0 18.0 17.0 16.0 3.50 3.60 = 25°C) A 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 2.5 3.0 3.5 4.0 = 25°C) A 3.6 OUTPUT SINK CURRENT VS SUPPLY VOLTAGE (V = 0.5V 3.00 3.25 3.30 SUPPLY VOLTAGE (V) INPUT CLAMP CURRENT VS INPUT VOLTAGE (V = 3.3V ...
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OUTPUT SOURCE CURRENT VS OUTPUT VOLTAGE (V = 3.3V 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 0.0 0.5 1.0 1.5 2.0 V (V) OH SUPPLY CURRENT VS INPUT FREQUENCY (V = 5.00V 25° ...
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... Ordering Code ATF750LVC-15JC ATF750LVC-15PC ATF750LVC-15SC ATF750LVC-15XC ATF750LVC-15JI ATF750LVC-15PI ATF750LVC-15SI ATF750LVC-15X Note: 1. Special order only; TSSOP package requires special thermal management. ATF750LVC Green Package Options (Pb/Halide-free/RoHS Compliant) Ext COS MAXS (ns) (ns) (MH ) Ordering Code ATF750LVC-15JU ATF750LVC-15PU ...
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Package Information 28J – PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) ...
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... Notes: 1. This package conforms to JEDEC reference MS-001, Variation AF. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ATF750LVC 14 D PIN TITLE 24P3, 24-lead (0.300"/7.62 mm Wide) Plastic Dual ...
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SOIC PIN 1 ID PIN 1 E 0º ~ 8º 2325 Orchard Parkway San Jose, CA 95131 TITLE 24S, 24-lead (0.300" body) Plastic Gull Wing Small Outline (SOIC) COMMON ...
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... TSSOP Dimensions in Millimeter and (Inches)* JEDEC STANDARD MO-153 AD Controlling dimension: millimeters PIN 1 0º ~ 8º 2325 Orchard Parkway San Jose, CA 95131 R ATF750LVC 16 0.30(0.012) 0.19(0.007) 4.48(0.176) 4.30(0.169) 0.65(0.0256)BSC 7.90(0.311) 7.70(0.303) 0.15(0.006) 0.05(0.002) 0.75(0.030) 0.45(0.018) TITLE 24X, 24-lead (4.4 mm body width) Plastic Thin Shrink Small Outline Package (TSSOP) 6 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2006. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...