cy8c9520a Cypress Semiconductor Corporation., cy8c9520a Datasheet
cy8c9520a
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cy8c9520a Summary of contents
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... Features 2 ■ I C™ interface logic electrically compatible with SMBus ■ (CY8C9520A), 40 (CY8C9540A (CY8C9560A) IO data pins independently configurable as inputs, outputs, bi-directional input/outputs, or PWM outputs ■ 4/8/16 PWM sources with 8-bit resolution ■ Extendable Soft Addressing™ algorithm allowing flexible I2C-address configuration ■ ...
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... Each GPIO pin can be used to monitor and control various board level devices, including LEDs and system intrusion detection devices. The on board EEPROM can be used to store information such as error codes or board manufacturing data for read-back by application software for diagnostic purposes. CY8C9520A, CY8C9540A CY8C9560A GPortx Output Register Select PWM ...
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... Hexidecimal numbers may also be represented by a ‘0x’ prefix, the C coding convention. Binary numbers have an appended lowercase ‘b’ (e.g., 01010100b’ or ‘01000011b’). Numbers not indicated by an ‘h’, ‘b’ are decimal. CY8C9520A, CY8C9540A CY8C9560A Table 7, “The Device Register 10. ...
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... Port 1, Bit 2, PWM 2. 26 GPort1_Bit1_PWM0 Port 1, Bit 1, PWM 0. 27 GPort1_Bit0_PWM2 Port 1, Bit 0, PWM Supply voltage. dd Document Number: 38-12036 Rev. *B Figure 2. CY8C9520A 28-Pin Device Description GPort0_Bit0_PWM3 GPort0_Bit1_PWM1 GPort0_Bit2_PWM3 GPort0_Bit3_PWM1 GPort0_Bit4_PWM3 GPort0_Bit5_PWM1 GPort0_Bit6_PWM3 GPort0_Bit7_PWM1 I2C Serial Clock (SCL) I2C Serial Clock (SDA) ...
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... GPort0_Bit2_PWM3 GPort0_Bit3_PWM1 GPort0_Bit4_PWM7 GPort0_Bit5_PWM5 GPort0_Bit6_PWM3 GPort0_Bit7_PWM1 GPort3_Bit0_PWM7 GPort3_Bit1_PWM5 GPort3_Bit2_PWM3 GPort3_Bit3_PWM1 GPort3_Bit4_PWM7 GPort3_Bit5_PWM5 GPort3_Bit6_PWM3 GPort3_Bit7_PWM1 GPort5_Bit2_PWM3 GPort5_Bit3_PWM1 I2C Serial Clock (SCL) I2C Serial Data (SDA) GPort2_Bit3_PWM3/A1 2 Write Disable. CY8C9520A, CY8C9540A CY8C9560A 48 1 Vdd 47 2 GPort1_Bit0_PWM6 46 GPort1_Bit1_PWM4 3 45 GPort1_Bit2_PWM2 GPort1_Bit3_PWM0 43 6 GPort1_Bit4_PWM6 42 ...
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... GPort0_Bit0_PWM7 96 DNU 97 GPort0_Bit1_PWM5 98 DNU 99 GPort0_Bit2_PWM3 100 DNU CY8C9520A, CY8C9540A CY8C9560A Description DNU = Do Not Use; leave floating. Port 5, Bit 1, PWM 8. Port 5, Bit 0, PWM 10. Port 5, Bit 4, PWM 12. Port 5, Bit 5, PWM 14. Port 4, Bit 7, PWM 8. Port 4, Bit 6, PWM 10. Port 4, Bit 5, PWM 12. Port 4, Bit 4, PWM 14. ...
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... GPort3_Bit6_PWM11 18 GPort3_Bit7_PWM9 19 GPort5_Bit7_PWM15 20 GPort5_Bit6_PWM13 21 GPort5_Bit2_PWM11 22 GPort5_Bit3_PWM9 23 I2C Serial Clock (SCL) 24 DNU 25 a. DNU = Do Not Use; leave floating. Document Number: 38-12036 Rev. *B Figure 4. CY8C9560A 100-Pin Device TQFP CY8C9520A, CY8C9540A CY8C9560A DNU 75 74 GPort1_Bit3_PWM0 DNU 73 72 GPort1_Bit4_PWM6 71 DNU 70 GPort1_Bit5_PWM4/A6 69 GPort1_Bit6_PWM2/A5 GPort1_Bit7_PWM0/ GPort4_Bit0_PWM6 ...
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... POR. Document Number: 38-12036 Rev. *B Working with PWMs There are four independent PWMs in the CY8C9520A, eight in the CY8C9540A and sixteen in the CY8C9560A. Each IO pin can be configured as a PWM output by writing ‘1’ to the corre- sponding bit of the Select PWM register (see and Select PWM Registers Logic,” ...
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... Output to GPort 2 At this moment, device performs output to GPort data from GPort1 A data from GPort 2 ACK from ACK from Slave Writing from GPort 1 CY8C9520A, CY8C9540A CY8C9560A Stop data(Addr) A data(Addr+1) A ... N P ACK from ACK from No ACK Master Master from Master Stop ...
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... IO. To allow input operations without reconfiguration, these registers have to store ’1’s. 00h Output register data also affects pin states when PWMs are 00h enabled. See Table 8. Output and Select PWM Registers Logic 00h for details. CY8C9520A, CY8C9540A CY8C9560A Default Register Register Value FFh 00h 00h FFh ...
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... Slow Strong Drive 0 Current PWM 23h High Impedance PWM Select Register (28h) This register is configures the PWM. Write a value of 00h-0Fh to this register to select the PWM to program with registers 29h-2Bh. CY8C9520A, CY8C9540A CY8C9560A Table 9. These registers Invert Input ...
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... corrupted then factory defaults are loaded and the low nibble of this register is set high to inform which set is active. The high nibble is always equal to 2 for CY8C9520A, 4 for CY8C9540A, and 6 for CY8C9560A. This register is read-only. ...
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... Current settings are unaffected by this command. New settings are loaded after the next device power the 07h command is issued. Document Number: 38-12036 Rev. *B CY8C9520A, CY8C9540A 2 Write E POR Defaults Cmd (03h) This command sends new power up defaults to the CY8C95xx without changing current settings unless the 07h command is issued afterwards ...
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... Read 146 data bytes (see ■ Read 1 CRC byte. Reconfigure Device Cmd (07h) This command immediately reconfigures the device with actual POR defaults from EEPROM. It has the same effect on the registers as a POR. Table 16. CY8C9520A, CY8C9540A CY8C9560A Table 16). Page [+] Feedback ...
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... Min Typ Max -40 – +85 -40 – +100 CY8C9520A, CY8C9540A CY8C9560A Unit of Measure Units Notes o C Higher storage temperatures reduces data retention time. Recommended storage temper ature is +25 C ± Extended duration storage temperatures ...
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... DC Chip-Level Specifications Table 20 lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ T ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ guidance only. Table 20. CY8C9520A DC Chip-Level Specifications Symbol Description Vdd Supply voltage I Supply current Vdd 5V ...
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... IOL for GPort1; GPort2_Bit0 GPort4; GPort5_Bit0 GPort7. 200 mA maximum combined IOL. – 0.8 V Vdd = 3.0 to 5.5. – V Vdd = 3.0 to 5.5. Gross tested to 1 μA. 1 – Package and pin dependent. Temp = 25 3 Package and pin dependent. Temp = 25 CY8C9520A, CY8C9540A CY8C9560A Notes Page [+] Feedback ...
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... TRiseF TRiseS ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design A Min Typ Max – 0.1 1.5 – 2.5 5.0 CY8C9520A, CY8C9540A CY8C9560A Units Notes MHz Normal Strong Mode ns Vdd = 4.75 to 5.25V, 10% - 90% ns Vdd = 4.75 to 5.25V, 10% - 90% ns Vdd = 3 to 5.25V, 10% - 90% ns Vdd = 3 to 5.25V, 10% - 90% ...
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... T SUDATI2C HDSTAI2C T SUSTAI2C Sr CY8C9520A, CY8C9540A CY8C9560A Fast Mode Units Notes Max – kHz μs – μs – μs – μs – μs – 3 – ns μs – μs – – Bus ...
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... Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at http://www.cypress.com/design/MR10161. Document Number: 38-12036 Rev. *B Figure 10. 28-Pb (210-Mil) SSOP CY8C9520A, CY8C9540A CY8C9560A 51-85079 - *C Page [+] Feedback ...
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... Document Number: 38-12036 Rev. *B Figure 11. 48-Pb (300-Mil) SSOP Figure 12. 100-Pb ( 1.0 mm) TQFP CY8C9520A, CY8C9540A CY8C9560A 51-85061 - *C 51-85048 - *C Page [+] Feedback ...
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... Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220+/-5 paste. Refer to the solder manufacturer specifications. Document Number: 38-12036 Rev Minimum Peak Temperature o 240 C o 220 C o 220 C CY8C9520A, CY8C9540A CY8C9560A Typical θ 101 C C C/W ...
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... Table 30 lists the CY8C95xxA device’s key package features and ordering codes. A definition of the ordering number code follows. Table 30. CY8C95xxA Device Key Features and Ordering Information 28 Pin (210 Mil) SSOP 28 Pin (210 Mil) SSOP (Tape and Reel) CY8C9520A-24PVXIT 48 Pin (300 Mil) SSOP 48 Pin (300 Mil) SSOP (Tape and Reel) CY8C9540A-24PVXIT ...
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... Document History Page Document Title: CY8C9520A, CY8C9540A, CY8C9560A, 20-, 40-, and 60-Bit IO Expander with EEPROM Document Number: 38-12036 Orig. of Revision ECN Change ** 346754 HMT New silicon, document. *A 392484 HMT Correct pin 79 on the TQFP. Add AC PWM Output Jitter spec. table. Upgrade to CY Perform logo and update zip code and trademarks ...