mm908e621 Freescale Semiconductor, Inc, mm908e621 Datasheet

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mm908e621

Manufacturer Part Number
mm908e621
Description
Integrated Quad Half-bridge And Triple High-side With Embedded Mcu And Lin For High End Mirror
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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mm908e621ACDWB
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Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2007. All rights reserved.
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
Integrated Quad Half-Bridge
and Triple High-Side with
Embedded MCU and LIN for
High End Mirror
includes a high-performance HC08 microcontroller with a
SMARTMOS
a timer, enhanced serial communications interface (ESCI), an
analog-to-digital converter (ADC), serial peripheral interface (SPI)
(only internal), and an internal clock generator module. The analog
control die provides four half-bridge and three high-side outputs with
diagnostic functions, a Hall-Effect sensor input, analog inputs,
voltage regulator, window watchdog, and local interconnect network
(LIN) physical layer.
application performance adjustments and space-saving PCB design.
It is well suited for the control of automotive high-end mirrors.
Features
• High-Performance M68HC908EY16 Core
• 16 K Bytes of On-Chip Flash Memory, 512 Bytes of RAM
• Internal Clock Generator Module (ICG)
• Two 16-Bit, 2-Channel Timers
• 10-Bit Analog-to-Digital Converter (ADC)
• LIN Physical Layer Interface
• Autonomous MCU Watchdog / MCU Supervision
• One Analog Input with Switchable Current Source
• Four Low RDS(ON) Half-Bridge Outputs
• Three Low RDS(ON) High-Side Outputs
• Wake-Up Input
• One 2/3-Pin Hall-Effect Sensor Input
The 908E621 is an integrated single-package solution that
The single-package solution, together with LIN, provides optimal
12 Microcontroller I/Os
TM
analog control IC. The HC08 includes flash memory,
µC PortA
µC PortB
µC PortC
µC PortD
µC PortE
Figure 1. 908E621 Simplified Application Diagram
Internally connected
Internally connected
LIN
VDDA/VREFH
EVDD
VDD
VSSA/VREFL
EVSS
VSS
RST_A
RST
IRQ_A
IRQ
PTA0/KBD0
PTA1/KBD1
PTA2/KBD2
PTA3/KBD3
PTA4/KBD4
PTB3/AD3
PTB4/AD4
PTB5/AD5
PTC2/MCLK
PTC3/OSC2
PTC4/OSC1
PTD0/TACH0
PTD1/TACH1
PTE1/RxD
GND[1:4]
VSUP[1:8]
EP
TESTMODE
A0CST
HVDD
HB1
HB2
HB3
HB4
HS1
HS2
HS3
A0
H0
L0
MM908E621ACDWB/R2
SIDE SWITCH WITH EMBEDDED MCU AND
QUAD HALF-BRIDGE AND TRIPLE HIGH-
Device
M
M
M
ORDERING INFORMATION
54-TERMINAL SOICW-EP
Wake Up Input
4 x Half Bridge Outputs
High Side Output 1
High Side Output 2
High Side Output 3
Switched 5V output
Analog Input with current source
Analog Input current source trim
2-/3-pin hall sensor input
Pull to ground for user mode
Document Number: MM908E621
908E621
98ARL10519D
DWB SUFFIX
LIN
-40°C to 85°C
Temperature
Range (T
A
Rev 4.0, 6/2007
)
54 SOICW-EP
Package

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mm908e621 Summary of contents

Page 1

... PTB4/AD4 PTB5/AD5 PTC2/MCLK HVDD PTC3/OSC2 PTC4/OSC1 A0 Internally connected A0CST PTD0/TACH0 PTD1/TACH1 H0 Internally connected PTE1/RxD TESTMODE GND[1:4] EP Document Number: MM908E621 Rev 4.0, 6/2007 908E621 LIN DWB SUFFIX 98ARL10519D 54-TERMINAL SOICW-EP ORDERING INFORMATION Temperature Device Package Range ( -40°C to 85°C 54 SOICW-EP Wake Up Input ...

Page 2

INTERNAL BLOCK DIAGRAM GND[1:4] VSUP[1:8] TESTMODE LIN RST_A IRQ_A PTE1/RXD PTD0/TACH0 IRQ RST VSSA/VREFL EVSS EVDD VDDA/VREFH 908E621 2 INTERNAL BLOCK DIAGRAM Internal Bus PORT C PORT D PORT E DDRC DDRD DDRE DDRA DDRB PORT A PORT B Analog ...

Page 3

Transparent Top PTC4/OSC1 View of Package PTC3/OSC2 PTC2/MCLK PTB5/AD5 PTB4/AD4 PTB3/AD3 (PTD0/TACH0/BEMF -> PWM) PTD1/TACH1 TESTMODE Table 1. Terminal Definitions A functional description of each terminal can be found in the Die Terminal Terminal Name MCU 1 PTC4/OSC1 2 PTC3/OSC2 ...

Page 4

TERMINAL CONNECTIONS Table 1. Terminal Definitions (continued) A functional description of each terminal can be found in the Die Terminal Terminal Name MCU 45 VSSA/VREFL VDDA/VREFH 48 MCU 46 EVSS 47 EVDD MCU 49 PTA4/KBD4 50 PTA3/KBD3 52 PTA2/KBD2 53 ...

Page 5

Table 1. Terminal Definitions (continued) A functional description of each terminal can be found in the Die Terminal Terminal Name Analog 42 VDD Analog 43 VSS – EP Exposed Pad Analog Integrated Circuit Device Data Freescale Semiconductor Functional Terminal Description ...

Page 6

MAXIMUM RATINGS Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding limits on any terminal may cause permanent damage to the device. Rating ELECTRICAL RATINGS Supply Voltage Analog Chip Supply Voltage under Normal Operation ...

Page 7

Table 2. Maximum Ratings (continued) All voltages are with respect to ground unless otherwise noted. Exceeding limits on any terminal may cause permanent damage to the device. Rating THERMAL RATINGS (3) Operating Ambient Temperature (4) Operating Junction Temperature Storage Temperature ...

Page 8

STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate ...

Page 9

Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean at T Characteristic ...

Page 10

STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean ...

Page 11

Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean at T Characteristic ...

Page 12

STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean ...

Page 13

Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean at T Characteristic ...

Page 14

STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) All characteristics are for the analog chip only. Refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V noted reflect the approximate parameter mean ...

Page 15

DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics All characteristics are for the analog chip only. Please refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V Typical values noted reflect the approximate ...

Page 16

DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics (continued) All characteristics are for the analog chip only. Please refer to the 68HC908EY16 datasheet for characteristics of the microcontroller chip. Characteristics noted under conditions 9.0 V Typical values noted reflect the ...

Page 17

MICROCONTROLLER PARAMETRICS Table 5. Microcontroller For a detailed microcontroller description, refer to the MC68HC908EY16 datasheet. Module Core High Performance HC08 Core with a Maximum Internal Bus Frequency of 8.0 MHz Timer Two 16-Bit Timers with 2 Channels (TIM A and ...

Page 18

TIMING DIAGRAMS LIN, L0 Note: Waveform in accordance to ISO7637 part 1, test pulses and 3b. Figure 4. Test Circuit for Transient Test Pulses TXD RXD Figure 5. Test Circuit for LIN Timing Measurements TXD V LIN ...

Page 19

TXD V LIN LIN t DOM-MAX RXD Figure 7. LIN Timing Measurements for Slow Slew Rate V Vrec LIN_REC LIN IRQ_A V Vrec LIN_REC LIN VDD Analog Integrated Circuit Device Data Freescale Semiconductor t DOM-MIN 61.6% V SUP 40% V ...

Page 20

TIMING DIAGRAMS V SUP V DD RST_A Figure 10. Power On Reset and Normal Request Time-out Timing 908E621 RST NORMREQ Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 21

The 908E621 was designed and developed as a highly integrated and cost-effective solution for automotive and industrial applications. For automotive body electronics, the 908E621 is well suited to perform complete mirror control via a three-wire LIN bus. This device combines ...

Page 22

FUNCTIONAL DESCRIPTION FUNCTIONAL TERMINAL DESCRIPTION EXTERNAL RESET TERMINAL ( RST A logic [0] on the terminal forces the MCU to a known RST startup state. is bidirectional, allowing a reset of the RST entire system driven LOW when ...

Page 23

INTERRUPT TERMINAL ( ) IRQ_A is the interrupt output terminal of the analog die IRQ_A indicating errors or wake-up events open drain with pullup resistor and must be connected to the the MCU. ADC SUPPLY/REFERENCE TERMINALS (VDDA/ ...

Page 24

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION 908E621 ANALOG DIE MODES OF OPERATION The 908E621 offers three operating modes: Normal (Run), Stop, and Sleep. In Normal mode the device is active and is operating under normal application conditions. The ...

Page 25

Stop mode has a higher current consumption than Sleep mode, but allows a quicker wake-up. Additionally the wake- up sources can be selected (maskable) which is not possible in Sleep mode. Figure 12 show the procedure to enter the Stop ...

Page 26

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES Table 6. Operating Modes Overview Device Mode Voltage Regulator Wake-Up Capabilities Reset Normal Request Normal (Run with limited DD Stop current capability Sleep V ...

Page 27

The interrupt function is available if the input is selected as General Purpose or as 2pin Hallsensor input. The interrupt is maskable with the H0IE bit in the Interrupt Mask Register. During Stop and Sleep mode the H0I circuitry ...

Page 28

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES INTERRUPT MASK REGISTER (IMR) Register Name and Address: IMR - $09 Bit7 Read L0IE H0IE LINIE HTRD HTIE Write Reset L0IE - L0 Input Interrupt Enable ...

Page 29

RESETS The 908E621 has four internal and one external reset source. VDD RST_A RESET SOURCE High Temperature Reset The device is protected against high temperature. When the chip temperature exceeds a certain temperature, a reset (HTR) is generated. The reset ...

Page 30

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES In addition the register includes two flags which will indicate the source of a wake-up from Sleep mode: Either LIN bus activity or an event on the L0 wake-up input terminal. Register Name and Address: ...

Page 31

For improved performance and safe behavior in case of LIN bus short to Ground or LIN bus leakage during low power mode the internal pull-up resistor on the LIN terminal is disconnected from VSUP and a small current source keeps ...

Page 32

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES A0 INPUT AND ANALOG MULTIPLEXER A0 - Analog Input Input analog input used for reading switches or as analog inputs for potentiometers, NTC, etc. Source Selection Bits SSx 4 Analog ADOUT Multiplexer ...

Page 33

This multiplexer has eleven different sources, which can be selected with the SS[3:0] bits in the A0MUCTL register. Half-bridge (HB1:HB4) Current Recopy The multiplexer is connected to the four current sense circuits ...

Page 34

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES H0F Figure 18. General purpose / hall-effect sensor input (H0) Current Coded Hallsensor Input H0 is selected as “2 pin hallsensor input”, if the corresponding H0MS bit in the H0/L0 Status and Control Register (HLSCTL) ...

Page 35

General Purpose Input H0 is selected as general purpose input, if the H0MS bit in the H0/L0 Status and Control Register (HLSCTL) is cleared. In this mode the input is usable as standard 5V input. The H0 VDD VDD 10k ...

Page 36

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES Wake-up input L0 The device provides one wake-up capable input for reading VSUP or VDD related signals. RUN mode The actual input state is reflected in bit L0F of the H0/L0 Status and Control register ...

Page 37

On/Off Status Control On/Off Status Figure 22. Half-Bridge Push-Pull Output Driver Analog Integrated Circuit Device Data Freescale Semiconductor High-Side Driver Charge Pump Overtemperature Protection Overcurrent Protection PWM Low-Side Driver Current Recopy Current Limitation Active Clamp Overcurrent Protection PWM FUNCTIONAL DEVICE ...

Page 38

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES Half-Bridge Control Each output MOSFET can be controlled individually. The general enable of the circuitry is done by setting PSON in the System Control Register (SYSCTL). The HBx_L and HBx_H bits form one half bridge. ...

Page 39

Half-Bridge Overvoltage/Undervoltage Protection The half-bridge outputs are protected against undervoltage and overvoltage conditions. This protection is done by the low and high voltage interrupt circuitry. If one of this flags (LVIF, HVIF) is set, the outputs are automatically disabled if ...

Page 40

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES Table 10. High-Side Configuration Bits HSxPWM HSxON Mode 0 0 High-side MOSFET off 0 1 High-side MOSFET on, in case of overcurrent the overcurrent flag (HSxOCF) is set and the High-side MOSFET is turned off ...

Page 41

HS Current HS Over-Current Shutdown Threshold PWM Terminal Figure 24. Inrush Current Limitation on HS Outputs High-Side Current Recopy Each High-Side has an additional sense output to allow a current recopy feature. This sense source is internally connected to a ...

Page 42

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES HSxPWM — High-Side PWM on/off Bits These read/write bits enable the PWM control of the High- Side Fet’s. Reset clears the HSxPWM bits High-Side x is controlled by PWM input signal 0 = ...

Page 43

SRS0-1 — LIN Slew rate Select Bits These read/write bits enable the user to select the appropriate LIN slew rate for different Baudrate configurations. Reset clears the SRS1:0 bits. Table 11. LIN Slew Rate Selection Bits SRS1 SRS0 Slew rate ...

Page 44

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES function is enabled it is not possible to disable it via software. Reset clears the WDRE bit. To prevent a Watchdog reset, the Watchdog timer has to be cleared in the Window Open frame. This ...

Page 45

STOP mode During STOP mode, the Stop mode regulator will take care of suppling a regulated output voltage. The Stop mode regulator has a limited output current capability. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES ...

Page 46

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS 908E621 SERIAL PHERIPHERAL INTERFACE (SPI) The Serial Peripheral Interface (SPI) creates the communication link between the MCU and the analog die. The interface consists of four terminals •MOSI - Master Out Slave In ...

Page 47

Master Data Byte This byte includes data to be written or no valid data during a read operation. Slave Status Byte This byte includes always the contents of the system status register ($0C) independent write or ...

Page 48

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS SPI REGISTER OVERVIEW TABLE 13 SUMMARIZES THE SPI REGISTER ADDRESSES AND THE BIT NAMES OF EACH REGISTER. Table 13. SPI Register Overview Addr Register Name R/W R System Control $00 (SYSCTL ...

Page 49

FACTORY TRIMMING AND CALIBRATION To enhance the ease-of-use of the 908E621, various parameters (e.g. ICG trim value) are stored in the flash memory of the device. The following flash memory locations are reserved for this purpose and might have a ...

Page 50

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Analog Die System Trim Values For improved application performance and to ensure the outlined datasheet values the analog die needs to be trimmed. For this purpose 3 trim values are stored in the ...

Page 51

CRHBHC1 CRHBHC0 Adjustment CRHB5:3 - Current Recopy HB3:4 Trim Bits These write only bits are for trimming of the current recopy of the half-bridge HB3 and HB4 (CSA=1). The provided trim values have to be copied ...

Page 52

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS CRHS2:0 - Current Recopy HS1 Trim Bits These write only bits are for trimming of the current recopy of the high-side HS1. The provided Trim values have to be copied into these bits ...

Page 53

... DATA 4 3 31, page 54. TYPICAL APPLICATIONS Figure 30), and not to provide the analog chip - IRQ IRQ_A VSUP[1:8] VDD GND[1:4] VSS +5V VDDA/VREFH RST EVDD RST_A 100nF IRQ VSSA/VREFL MM908E621 IRQ_A EVSS +5V TESTMODE 10k PTC4/OSC1 PTB4/AD4 10k PTA1/KBD1 PTA0/KBD0 10k PTB3/AD3 908E621 ). 4.7µF 53 ...

Page 54

... DD ≤ 4.5V TST DD (see SUP V DD VSUP[1:8] VDD VSS GND[1:4] VDDA/VREFH RST EVDD RST_A 100nF IRQ VSSA/VREFL MM908E621 IRQ_A EVSS 10k TESTMODE CLK PTC4/OSC1 10k PTB4/AD4 10k PTA1/KBD1 PTA0/KBD0 10k PTB3/AD3 Communication Speed Normal COP Request External Time-out Bus Clock Frequency 9 ...

Page 55

... Figure 32 and schematics and layout level and Table recommended external components and layout considerations. VSUP[1:8] VDD C2 VSS VDDA/VREFH LIN EVDD C5 MM908E621 EVSS GND[1:4] VSSA/VREFL Figure 32. EMC/EMI recommendations TYPICAL APPLICATIONS Figure 33 show the recommendations on 23 indicates C3 C4 908E621 55 ...

Page 56

TYPICAL APPLICATIONS Component Recommended Value D1 C1 Bulk Capacitor C2 100nF, SMD ...

Page 57

Important For the most current revision of the package, visit drawing number: 98ARL10519D. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS www.freescale.com and do a keyword search on the 98A DWB SUFFIX 54-TERMINAL SOICW-EP 98ARL10519D ISSUE A PACKAGE DIMENSIONS ...

Page 58

... All electrical, application and packaging information is provided in the data sheet. Package and Thermal Considerations This MM908E621 is a dual die package. There are two heat sources in the package independently heating with P 1 temperatures, T ...

Page 59

PTC4/OSC1 54 PTC3/OSC2 PTC2/MCLK 52 4 PTB5/AD5 51 PTB4/AD4 PTB3/AD3 IRQ 8 RST 47 9 (PTD0/TACH0/BEMF -> PWM PTD1/TACH1 RST_A 12 43 IRQ_A 13 LIN ...

Page 60

ADDITIONAL INFORMATION THERMAL ADDENDUM (REV 1. 100 10 1 0.1 1.00E-03 1.00E-02 Figure 37. Transient Thermal Resistance R Device on Thermal Test Board Area A = 600 (mm 908E621 60 R θJA11 ...

Page 61

REVISION DATE DESCRIPTION OF CHANGES • Implemented Revision History page 2/2007 3.0 • Changed Table 3, Ststic Electrical Characteristics, Hall-Effect Sensor Input H0 - 2pin Hall Sensor Input Mode (H0MS = 1), Typical from 1100 to none. • Removed “Advance” ...

Page 62

... Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MM908E621 Rev 4.0 6/2007 RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http://www.freescale.com Freescale sales representative. For information on Freescale’ ...

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