sta1050 STMicroelectronics, sta1050 Datasheet
sta1050
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sta1050 Summary of contents
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... Built-in stereo DAC with 96 dB SNR ■ De-emphasis filter built-in Development Environment ■ On Chip ST7 Emulation (2 dedicated pins) ■ C language compiler for ST7, Macro assembler, Linker, archiver, functional simulator ■ Windows debugger Package LQFP128 Rev 1 STA1050 DATA BRIEF Packing Tube 1/11 www.st.com 11 ...
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... Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 System description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2/11 STA1050 ...
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... STA1050 1 Block diagram Figure 1. Block diagram SPDIF/SONYLSI/I2S/MOST master clock + Block diagram observ/ debug 3/11 ...
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... Analog for servo channels/ 3.3V for AFE pad ring (decoupling cap to Vssa) 3.3V for AFE pad ring General purpose ADC input 1 General purpose ADC input 2 General purpose ADC Vtop reference output External Vref Pickup (decoupling cap 1nF) STA1050 Pin Type bidir, 3.3V, 2mA bidir, 3.3V, 2mA Vdd Vdd in, 3.3V in, 3 ...
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... STA1050 Table 1. Pin List- LQFP128 (continued) N° Name 33 FE_VDDA33R 34 FE_CEXT 35 FE_REXT 36 FE_VSSA33R 37 FE_MD_LAS 38 FE_CAP_LAS 39 FE_LD_LAS 40 FE_LD1_LAS 41 FE_VDDPAD2 42 FE_VDDA33T 43 FE_TESTP 44 FE_TESTN 45 FE_VSSA33T 46 FE_VDDA18AD 47 FE_VSSA18AD 48 #nc 49 FFSR 50 #nc 51 REFFSR 52 SPDL 53 SLED1 54 SLED2 55 ICC1/GPB6 56 ICC2/GPB7 57 VDD_TOP 58 TFSR 59 VSS_TOP 60 VSSPAD1 61 VDDPAD2 62 VDDPAD3 63 ICD_N 64 DRD4/FLASH_OE 65 GPB0/CAV ...
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... SDRAM CLK SDRAM Data 3 or ST7 GPIO PC3 SDRAM Address 0 or Flash Address 0 Pad Ring ground SDRAM Col address sel or Flash Address 15 SDRAM Row address sel or Flash Address 14 STA1050 Pin Type bidir, 3.3V, 2mA bidir, 3.3V, 2mA bidir, 3.3V, 2mA bidir, 3.3V, 2mA bidir, 3.3V, 2mA ...
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... STA1050 Table 1. Pin List- LQFP128 (continued) N° Name 103 DRD14/FLASHD6 104 DRBA1/FLASHA13 105 DRBA0/FLASHA12 106 DRA11/FLASHA11 107 DRD13/FLASHD5 108 DRA10/FLASHA10 109 DRA9/FLASHA9 110 DRD12/FLASHD4 111 DRWR/FLASHA16 112 VDDPAD6 113 DRD11/FLASHD3 114 DRD2/GPC2 115 DRA8/FLASHA8 116 DRA7/FLASHA7 117 DRA6/FLASHA6 118 DRD10/FLASHD2 119 ...
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... IC to drive focus, tracking, spindle, sledge and tray motors – a SDRAM to implement shock-proof handling (if needed) STA1050 includes an embedded 8-bit CPU (ST7) running from an internal ROM (or Flash for debug) Program memory. The laser diode is driven directly using an embedded power PMOS. ...
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... STA1050 4 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... Revision history 5 Revision history Table 2. Document revision history Date 21-Nov-2006 10/11 Revision 1 Initial release. STA1050 Changes ...
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... STA1050 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...