mc68hc05p18a Freescale Semiconductor, Inc, mc68hc05p18a Datasheet
mc68hc05p18a
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mc68hc05p18a Summary of contents
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... Freescale Semiconductor, Inc For More Information On This Product, MC68HC05P18A HCMOS Microcontroller Unit Go to: www.freescale.com Order this document by MC68HC05P18A/D TECHNICAL DATA ...
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... Motorola was negligent regarding the design or manufacture of the part. Technical Data For More Information On This Product, Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A Section 1. General Description . . . . . . . . . . . . . . . . . . . . 15 Section 2. Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Section 3. Central Processor Unit (CPU Section 4. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Section 5. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Section 6. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . 49 Section 7. Input/Output (I/O) Ports . . . . . . . . . . . . . . . . . 55 Section 8. 16-Bit Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Section 9. Serial Input/Output Ports (SIOP Section 10. EEPROM Section 11. Analog-to-Digital (A/D) Converter . . . . . . . . 91 Section 12 ...
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... Freescale Semiconductor, Inc. List of Sections Technical Data For More Information On This Product, List of Sections Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 1.1 1.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.2.1 1.5.2.2 1.5.2.3 1.5.3 1.5.4 1.5.5 1.5.6 1.5.7 1.5.8 1.5.9 1.5.10 2.1 2.2 2.3 2.4 2.5 2.6 MC68HC05P18A For More Information On This Product, Section 1. General Description Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Mask Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Functional Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Power Supply (V and Oscillator Pins (OSC1 and OSC2 .20 Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Ceramic Resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 External Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Reset (RESET .22 Port A (PA0–PA7 .22 Port B (PB5/SDO, PB6/SDI, and PB7/SCK .23 Port C (PC0– ...
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... Software Interrupt (SWI .42 Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 External Interrupt (IRQ .43 Input Capture Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . .43 Output Compare Interrupt . . . . . . . . . . . . . . . . . . . . . . . .44 Timer Overflow Interrupt . . . . . . . . . . . . . . . . . . . . . . . . .44 Section 5. Resets Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 External Reset (RESET .46 Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Power-On Reset (POR .47 Computer Operating Properly (COP) Reset . . . . . . . . . . . . .47 Low-Voltage Reset (LVR .48 Table of Contents Go to: www.freescale.com MC68HC05P18A ...
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... MC68HC05P18A For More Information On This Product, Section 6. Operating Modes Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 User Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 STOP Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Halt Mode .53 WAIT Instruction .53 COP Watchdog Timer Considerations . . . . . . . . . . . . . . . . . . .54 Section 7. Input/Output (I/O) Ports Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Port .56 Port .57 Port .58 Port .59 I/O Port Programming .60 Section 8 ...
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... Section 11. Analog-to-Digital (A/D) Converter Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 Analog Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Ratiometric Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Reference Supply Voltage (V Accuracy and Precision . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Conversion Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Digital Section .93 Conversion Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 Internal versus External Oscillator . . . . . . . . . . . . . . . . . . . .93 Multi-Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .94 A/D Status and Control Register .94 A/D Conversion Value Data Register . . . . . . . . . . . . . . . . . . . .96 Table of Contents Go to: www.freescale.com ) . . . . . . . . . . . . . . . . . . .92 REFH MC68HC05P18A ...
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... MC68HC05P18A For More Information On This Product, A/D Subsystem Operation during Wait Mode and Halt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 A/D Subsystem Operation during Stop Mode .96 Section 12. Instruction Set Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Immediate .99 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Extended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Indexed, No Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Indexed, 8-Bit Offset .100 Indexed,16-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Relative ...
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... For More Information On This Product, Section 14. Mechanical Specifications Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125 28-Pin Plastic Dual In-Line Package (Case #710 .126 28-Pin Small Outline Package (Case #751F .126 Section 15. Ordering Information Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127 MC Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127 Table of Contents Go to: www.freescale.com MC68HC05P18A ...
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... MC68HC05P18A For More Information On This Product, Title MC68HC05P18A Block Diagram . . . . . . . . . . . . . . . . . . . . . . .17 User Mode Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 MC68HC05P18A User Mode Memory Map . . . . . . . . . . . . . . .27 MC68HC05P18A I/O and Control Registers Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 I/O and Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Accumulator ( .35 Index Register (X .35 Stack Pointer (SP .36 Program Counter (PC .36 Condition Code Register (CCR) ...
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... Output Compare Registers (OCRH/OCRL .68 Output Compare Software Initialization Example . . . . . . . . . . .69 Input Capture Registers (ICRH/ICRL .70 State Timing Diagram for Input Capture . . . . . . . . . . . . . . . . . .71 SIOP Block Diagram .78 SIOP Timing Diagram .79 SIOP Control Register (SCR .80 SIOP Status Register (SSR .82 SIOP Data Register (SDR .83 List of Figures Go to: www.freescale.com Page MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A Table 4-1 6-1 7-1 7-2 7-3 7-4 10-1 Erase Mode Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 11-1 A/D Multiplexer Input Channel Assignments . . . . . . . . . . . . . .95 12-1 Register/Memory Instructions . . . . . . . . . . . . . . . . . . . . . . . . .102 12-2 Read-Modify-Write Instructions . . . . . . . . . . . . . . . . . . . . . . .103 12-3 Jump and Branch Instructions . . . . . . . . . . . . . . . . . . . . . . . .105 12-4 Bit Manipulation Instructions .106 12-5 Control Instructions .107 12-6 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . .108 12-7 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114 15-1 MC Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127 ...
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... Freescale Semiconductor, Inc. List of Tables Technical Data For More Information On This Product, List of Tables Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 1.1 Contents 1.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.2.1 1.5.2.2 1.5.2.3 1.5.3 1.5.4 1.5.5 1.5.6 1.5.7 1.5.8 1.5.9 1.5.10 MC68HC05P18A For More Information On This Product, Section 1. General Description Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Mask Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Functional Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Power Supply (V and Oscillator Pins (OSC1 and OSC2 .20 Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Ceramic Resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 External Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Reset (RESET .22 Port A (PA0–PA7 .22 Port B (PB5/SDO, PB6/SDI, and PB7/SCK .23 Port C (PC0– ...
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... This device is available in: • • A functional block diagram of the MC68HC05P18A is shown in Figure Technical Data For More Information On This Product, 4-channel, 8-bit analog-to-digital (A/D) converter 16-bit timer with output compare and input capture Serial communications port (SIOP) Computer operating properly (COP) watchdog timer ...
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... EEPROM — 128 BYTES PORT B AND PB5/SDO SIOP PB6/SDI REGISTERS PB7/SCK AND LOGIC Figure 1-1. MC68HC05P18A Block Diagram NOTE: A line over a signal name indicates an active low signal. For example, RESET is active high and RESET is active low. MC68HC05P18A For More Information On This Product, PH2 ALU ...
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... Freescale Semiconductor, Inc. General Description 1.3 Features Features of the MC68HC05P18A include: • • • • • • • • • • • • • • • • • Technical Data For More Information On This Product, Low-cost, HC05 core running at 2-MHz bus speed, or the 4-MHz ...
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... Freescale Semiconductor, Inc. 1.4 Mask Options The MC68HC05P18A has eight mask options: 1. IRQ is edge- and level-sensitive or edge-sensitive only. 2. SIOP MSB (most-significant bit) first or LSB (least-significant bit) 3. SIOP clock rate set to OSC divided 16, 32, 64, 128 COP watchdog timer enabled or disabled 5 ...
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... PA1 9 PA0 10 SDO/PB5 11 SDI/PB6 12 SCK/PB7 Figure 1-2. User Mode Pinout ) SS is connected to ground. SS General Description Go to: www.freescale.com OSC1 26 OSC2 25 PD7/TCAP 24 TCMP 23 PD5/CKOUT 22 PC0 21 PC1 20 PC2 19 PC3/AD3 18 PC4/AD2 17 PC5/AD1 16 PC6/AD0 15 PC7/V REFH and connected Figure 1-3 (a) Figure 1-3 (b) MC68HC05P18A ...
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... The load capacitance values used in the oscillator circuit design should include all stray capacitances. Mount the crystal and components as close as possible to the pins for startup stabilization and to minimize output distortion. MC68HC05P18A For More Information On This Product the oscillator or external clock source is divided OSC ...
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... Eight mask options can be chosen to enable pullups and interrupts (active low) on port A pins (see Options). Refer to Interrupts. Technical Data For More Information On This Product, Figure 1-3 (a) can be used for a ceramic Figure 1-3 (b). Section 5. Resets. Section 7. Input/Output (I/O) Ports General Description Go to: www.freescale.com 1.4 Mask and Section 4. MC68HC05P18A ...
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... D function must be chosen with the mask option and is not alterable in software. 1.5.8 Timer Output Compare (TCMP) TCMP is the output from the 16-bit timer’s output compare function low after reset. Refer to MC68HC05P18A For More Information On This Product, Section 7. Input/Output (I/O) Ports (SIOP). Section 7. Input/Output (I/O) and Section 8 ...
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... If the IRQ pin is not used, it must be tied to the V contains an internal Schmitt trigger as part of its input circuitry to improve noise immunity. Refer to 1.5.10 CPU Core The MC68HC05P18A uses a standard M68HC05 series CPU core. A description of the instruction set is in Technical Data For More Information On This Product, time period ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 2.1 Contents 2.2 2.3 2.4 2.5 2.6 2.2 Introduction The MC68HC05P18A utilizes 14 address lines to access an internal memory space covering 16 Kbytes. This memory space is divided into: • • • • MC68HC05P18A For More Information On This Product, Section 2. Memory Map Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 User Mode Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 I/O and Control Registers ...
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... Freescale Semiconductor, Inc. Memory Map 2.3 User Mode Memory Map When the MC68HC05P18A is in user mode, these are active: • • • • • • See Figure 2.4 I/O and Control Registers Figure 2-2 at locations $0000–$001F. NOTE: Reading unimplemented bits returns unknown states, and writing unimplemented bits is ignored ...
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... USER ROM 8000 BYTES 16127 16128 RESERVED FOR TEST 240 BYTES 16367 16368 USER VECTORS ROM 16 BYTES 16383 Figure 2-1. MC68HC05P18A User Mode Memory Map Memory Map Go to: www.freescale.com Memory Map I/O and Control Registers $0000 I/O REGISTERS SEE FIGURE 2-2 $001F COP CONTROL REGISTER $3FF0 ...
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... OUTPUT COMPARE LSB TIMER MSB TIMER LSB ALTERNATE COUNTER MSB ALTERNATE COUNTER LSB EEPROM PROGRAMMING REGISTER A/D CONVERTER DATA REGISTER A/D CONVERTER CONTROL & STATUS REGISTER RESERVED FOR TEST Figure 2-2. MC68HC05P18A I/O and Control Registers Memory Map Memory Map Go to: www.freescale.com $0000 $0001 $0002 $0003 $0004 ...
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... Write: See page 58. Reset: Read: Port D Data Direction $0007 (DDRD) Write: See page 59. Reset: $0008 Unimplemented Figure 2-3. I/O and Control Registers (Sheet MC68HC05P18A For More Information On This Product, Bit PA7 PA6 PA5 PA4 Unaffected by reset 0 PB7 PB6 PB5 ...
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... ICRH5 ICRH4 Unaffected by reset = Unimplemented R Memory Map Go to: www.freescale.com Bit SDR3 SDR2 SDR1 SDR0 IEDG OLVL ICRH3 ICRH2 ICRH1 ICRH0 = Reserved U = Unaffected MC68HC05P18A ...
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... Register (EEPROG) Write: See page 86. Reset: Read: A/D Conversion Value Data $001D Register (ADC) Write: See page 96. Reset: Figure 2-3. I/O and Control Registers (Sheet MC68HC05P18A For More Information On This Product, Bit ICRL6 ICRL5 ICRL4 Unaffected by reset OCRH7 OCRH6 OCRH5 ...
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... There are 8064 bytes of user ROM available, consisting of: • • • NOTE: Address space $3F00–$3FEF is reserved for test code. Unlike other M68HC05 devices, the MC68HC05P18A does not contain self-check code. Technical Data For More Information On This Product, Bit ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 3.1 Contents 3.2 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.4 3.2 Introduction This section describes the central processor unit (CPU) registers. MC68HC05P18A For More Information On This Product, Section 3. Central Processor Unit (CPU) Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Index Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Stack Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Condition Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Arithmetic/Logic Unit ...
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... PCL HALF-CARRY FLAG INTERRUPT MASK NEGATIVE FLAG ZERO FLAG CARRY/BORROW FLAG Figure 3-1. Programming Model Central Processor Unit (CPU) Go to: www.freescale.com ACCUMULATOR (A) 0 INDEX REGISTER (X) 0 STACK POINTER (SP) 0 PROGRAM COUNTER (PC CONDITION CODE REGISTER (CCR) MC68HC05P18A ...
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... During a reset or after the reset stack pointer (RSP) instruction, the stack pointer is preset to $00FF. The address in the stack pointer decrements as data is pushed onto the stack and increments as data is pulled from the stack. MC68HC05P18A For More Information On This Product, Bit 7 6 ...
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... For More Information On This Product Figure 3-4. Stack Pointer (SP Loaded with vectors from $3FF3 and $3FFF Central Processor Unit (CPU) Go to: www.freescale.com Bit Bit MC68HC05P18A ...
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... After any reset, the interrupt mask is set and can be cleared only by a software instruction. Negative Flag The CPU sets the negative flag when an arithmetic operation, logical operation, or data manipulation produces a negative result. MC68HC05P18A For More Information On This Product, Bit ...
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... ALU. The multiply instruction (MUL) requires 11 internal clock cycles to complete this chain of operations. Technical Data For More Information On This Product, Central Processor Unit (CPU) Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 4.1 Contents 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.3.1 4.4.3.2 4.4.3.3 4.4.3.4 4.2 Introduction The MCU can be interrupted six different ways: 1. Non-maskable software interrupt instruction (SWI) 2. External asynchronous interrupt (IRQ) 3. Input capture interrupt (TIMER) 4. Output compare interrupt (TIMER) 5. Timer overflow interrupt (TIMER) 6. Port A interrupt, if selected as a mask option ...
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... CPU Vector Address Interrupt RESET $3FFE–$3FFF SWI $3FFC–$3FFD IRQ $3FFA–$3FFB TIMER $3FF8–$3FF9 TIMER $3FF8–$3FF9 TIMER $3FF8–$3FF9 N/A $3FF6–$3FF7 N/A $3FF4–$3FF5 N/A $3FF2–$3FF3 N/A $3FF0–$3FF1 MC68HC05P18A ...
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... CPU state to be recovered from the stack and normal processing to resume at the next instruction that was to be executed when the interrupt took place. that occur during interrupt processing. Y FETCH NEXT INSTRUCTION MC68HC05P18A For More Information On This Product, Figure 4-1 FROM RESET IS I BIT SET? ...
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... The program to vector to its starting address, which is specified by the contents of memory locations $3FFE and $3FFF The I bit in the condition code register (CCR set The MCU to be configured to a known state as described in Section 5. Resets. Interrupts Go to: www.freescale.com Figure 4-1. A low-level input MC68HC05P18A ...
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... Input Capture Interrupt The input capture interrupt is generated by the 16-bit timer as described in Section 8. 16-Bit MC68HC05P18A For More Information On This Product, External interrupt (IRQ) Input capture interrupt Output compare interrupt Timer overflow interrupt Timer. The input capture interrupt flag is located in Interrupts Go to: www ...
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... This internal interrupt will vector to the interrupt service routine located at the address specified by the contents of memory locations $3FF8 and $3FF9. Technical Data For More Information On This Product, Section 8. 16-Bit Timer. The output compare interrupt flag Timer. The timer overflow interrupt flag is located in Interrupts Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 5.1 Contents 5.2 5.3 5.4 5.4.1 5.4.2 5.4.3 5.2 Introduction The MCU can be reset from four sources: • • The RESET pin is an input with a Schmitt trigger as shown in Figure reset signal (RST), which is the logical OR of internal reset functions and is clocked by PH2. ...
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... For More Information On This Product, CLOCKED ONE-SHOT PH2 PH2 Figure 5-1. Reset Block Diagram Section 13. Electrical Initial power-on reset (POR) Computer operating properly (COP) watchdog timer Low-voltage reset (LVR) Resets Go to: www.freescale.com TO IRQ LOGIC CPU OTHER LATCH PERIPHERALS RST Specifications. MC68HC05P18A ...
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... The COP register is shared with the most-significant bit (MSB unimplemented user interrupt vector, as shown in this location returns the MSB of the unimplemented user interrupt vector. Writing to this location clears the COP watchdog timer. Address: Read: Write: Reset: MC68HC05P18A For More Information On This Product, $3FF0 Bit ...
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... The LVR generates the RST signal, which resets the CPU and other peripherals. If any other reset function is active at the end of the LVR reset signal, the RST signal remains in the reset condition until the other reset condition(s) end. Technical Data For More Information On This Product, supply voltage is below reasonable DD Resets Go to: www.freescale.com DD MC68HC05P18A ...
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... Technical Data — MC68HC05P18A 6.1 Contents 6.2 6.3 6.4 6.4.1 6.4.1.1 6.4.1.2 6.4.2 6.5 6.2 Introduction The MC68HC05P18A has one user mode of operation and several low- power modes which are described in this section. MC68HC05P18A For More Information On This Product, Section 6. Operating Modes Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 User Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 STOP Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Halt Mode .53 WAIT Instruction ...
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... Low-Power Modes The MC68HC05P18A is capable of running in a low-power mode in each of its configurations. The WAIT and STOP instructions provide three modes that reduce the power required for the MCU by stopping various internal clocks and/or the on-chip oscillator. The STOP and WAIT instructions are not normally used if the computer operating properly (COP) watchdog timer is enabled ...
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... INTERRUPT? RESTART EXTERNAL N OSCILLATOR START STABILIZATION DELAY END OF STABILIZATION DELAY? N Figure 6-1. Stop, Halt, and Wait Modes Flowchart MC68HC05P18A For More Information On This Product, HALT EXTERNAL OSCILLATOR ACTIVE AND INTERNAL TIMER CLOCK ACTIVE STOP RC OSCILLATOR STOP INTERNAL PROCESSOR CLOCK CLEAR I BIT IN CCR ...
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... M68HC05 Family and places the MCU in stop mode. instruction behaves like a WAIT instruction (with the exception of a brief delay at startup) and places the MCU in halt mode. An IRQ external interrupt Port A external interrupt, if selected as a mask option An externally generated reset Operating Modes Go to: www.freescale.com MC68HC05P18A ...
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... COP watchdog timer. Execution of the WAIT instruction automatically clears the I bit in the condition code register, enabling the IRQ external interrupt. All other registers, memory, and input/output lines remain in their previous state. MC68HC05P18A For More Information On This Product, Operating Modes Go to: www.freescale.com ...
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... WAIT time less than COP timeout WAIT time MORE than COP timeout Any length WAIT time Operating Modes Go to: www.freescale.com Table 6-1. THEN the COP Watchdog Timer Should: Enable or disable COP via mask option Disable COP via mask option Disable COP via mask option MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 7.1 Contents 7.2 7.3 7.4 7.5 7.6 7.7 7.2 Introduction In user mode, 20 bidirectional input/output (I/O) lines are arranged as: • • • These ports are programmable as either inputs or outputs under software control of the data direction registers (DDRs). There is also an input-only pin associated with port D. ...
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... RESET (RST) Technical Data For More Information On This Product, Figure DATA DIRECTION REGISTER BIT DATA REGISTER BIT MASK OPTION (PULLUP INHIBIT) Figure 7-1. Port A I/O Circuitry Input/Output (I/O) Ports Go to: www.freescale.com 7-1. Each port A pin is controlled I/O OUTPUT PIN 100 A PULLUP IRQ INTERRUPT SYSTEM MC68HC05P18A ...
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... See (SIOP) READ $0005 WRITE $0005 RESET (RST) WRITE $0001 READ $0001 INTERNAL HC05 DATA BUS MC68HC05P18A For More Information On This Product, Figure 7-2). Section 9. Serial Input/Output Ports for a discussion of the SIOP subsystem. DATA DIRECTION REGISTER BIT DATA REGISTER BIT Figure 7-2 ...
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... For More Information On This Product, 7-3). Two port C pins, PC0 and PC1, can source and sink a regarding current specifications. DATA DIRECTION REGISTER BIT DATA REGISTER BIT Figure 7-3. Port C I/O Circuitry Input/Output (I/O) Ports Go to: www.freescale.com Section 13. Electrical Converter. HIGH CURRENT CAPABILITY, PC0 AND PC1 ONLY I/O OUTPUT PIN MC68HC05P18A ...
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... D data register at any time. READ $0007 WRITE $0007 RESET (RST) WRITE $0003 READ $0003 INTERNAL HC05 DATA BUS MC68HC05P18A For More Information On This Product, One bidirectional pin, PD5/CKOUT One input-only pin, PD7 DATA DIRECTION REGISTER BIT DATA REGISTER BIT Figure 7-4. Port D I/O Circuitry Input/Output (I/O) Ports Go to: www ...
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... Table 7-4. Access to Data Register @ $0000 Read Write I/O pin See note PA0–PA7 PA0–PA7 Access to Data Register @ $0001 Read Write I/O pin See note PB5–PB7 PB5–PB7 Access to Data Register @ $0002 Read Write I/O pin See note PC0–PC7 PC0–PC7 MC68HC05P18A ...
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... Note: Does not affect input, but stored to data register NOTE: To avoid generating a glitch on an I/O port pin, data should be written to the I/O port data register before writing a logical 1 to the corresponding data direction register. MC68HC05P18A For More Information On This Product, Table 7-4. Port D I/O Pin Functions Access to DDRD @ $0007 ...
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... Freescale Semiconductor, Inc. Input/Output (I/O) Ports Technical Data For More Information On This Product, Input/Output (I/O) Ports Go to: www.freescale.com MC68HC05P18A ...
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... Introduction The MC68HC05P18A MCU contains a single 16-bit programmable timer with an input capture function and an output compare function. The 16- bit timer is driven by the output of a fixed divide-by-four prescaler operating from the PH2 clock. The 16-bit timer may be used for many applications, including input waveform measurement while simultaneously generating an output waveform ...
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... INTERNAL HC05 BUS PH2 BUFFER CLOCK FREE- RUNNING COUNTER TMRH/ACRH TMRL/ACRL OVERFLOW DETECTOR TOF ICF INTERRUPT GENERATOR OCIE TOIE ICIE 16-Bit Timer Go to: www.freescale.com INPUT CAPTURE ICRH ICRL 4 EDGE TCAP DETECTOR TCMP D Q > R RESET TIMER INTERRUPT TIMER CONTROL IEDG OLVL REGISTER MC68HC05P18A ...
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... When reading either the timer or alternate counter registers, if the MSB is read, the LSB must also be read to complete the read sequence. See Figure 8-2 MC68HC05P18A For More Information On This Product, The timer registers, TMRH and TMRL The alternate counter registers, ACRH and ACRL ...
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... ACRL4 Unimplemented 16-Bit Timer Go to: www.freescale.com Bit 0 TMRH3 TMRH2 TMRH1 TMRH0 Bit 0 TMRL3 TMRL2 TMRL1 TMRL0 Bit 0 ACRH3 ACRH2 ACRH1 ACRH0 Bit 0 ACRL3 ACRL2 ACRL1 ACRL0 MC68HC05P18A ...
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... INTERNAL RESET 16-BIT FREE-RUNNING COUNTER RESET (EXTERNAL OR OTHER) Note: The counter and control registers are the only 16-bit timer registers affected by reset. Figure 8-5. State Timing Diagram for Timer Reset MC68HC05P18A For More Information On This Product, 8-4. $FFFF $0000 $FFFC $FFFD 16-Bit Timer Go to: www ...
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... Bit OCRH7 OCRH6 OCRH5 OCRH4 Unaffected by reset $0017 Bit OCRL7 OCRL6 OCRL5 OCRL4 Unaffected by reset Figure 8-6. Output Compare Registers (OCRH/OCRL) 16-Bit Timer Go to: www.freescale.com Figure 8- Bit 0 OCRH3 OCRH2 OCRH1 OCRH0 Bit 0 OCRL3 OCRL2 OCRL1 OCRL0 MC68HC05P18A ...
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... • Figure 8-7. Output Compare Software Initialization Example MC68HC05P18A For More Information On This Product, (CCR). inhibit further compares until the LSB is written. flag (OCF). enable the output compare function and to clear its flag and interrupt. SEI • • ...
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... ICRH4 Unaffected by reset $0015 Bit ICRL7 ICRL6 ICRL5 ICRL4 Unaffected by reset Figure 8-8. Input Capture Registers (ICRH/ICRL) Figure 8-9). This delay is required for internal 16-Bit Timer Go to: www.freescale.com Bit 0 ICRH3 ICRH2 ICRH1 ICRH0 Bit 0 ICRL3 ICRL2 ICRL1 ICRL0 MC68HC05P18A ...
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... Note: If the input edge occurs in the shaded area from one T10 timer state to the other T10 timer state, the input capture flag is set during the next T11 timer state. Figure 8-9. State Timing Diagram for Input Capture MC68HC05P18A For More Information On This Product, $FFEC ...
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... Technical Data For More Information On This Product, Figure 8-10 $0012 Bit ICIE OCIE TOIE Unimplemented Figure 8-10. Timer Control Register (TCR) 16-Bit Timer Go to: www.freescale.com and free-running counter Bit IEDG OLVL Unaffected MC68HC05P18A ...
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... TMRL). Registers ACRH and ACRL can be read at any time without affecting the timer overflow flag (TOF) or interrupt. Address: Read: Write: Reset: MC68HC05P18A For More Information On This Product, purpose of servicing the flag or interrupt. $0013 Bit ...
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... If a valid input capture edge occurs at the TCAP pin during stop mode, the input capture detect circuitry is armed. This action does not set any flags or wake up the MCU, but when the MCU does wake up there will Technical Data For More Information On This Product, 16-Bit Timer Go to: www.freescale.com MC68HC05P18A ...
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... If the stop mode is exited by an external RESET, no input capture flag or data will be present even if a valid input capture edge was detected during stop mode. MC68HC05P18A For More Information On This Product, 16-Bit Timer Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. 16-Bit Timer Technical Data For More Information On This Product, 16-Bit Timer Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A Section 9. Serial Input/Output Ports (SIOP) 9.1 Contents 9.2 9.3 9.3.1 9.3.2 9.3.3 9.4 9.4.1 9.4.2 9.4.3 9.2 Introduction The simple synchronous serial input/output (I/O) port (SIOP) subsystem is designed to provide efficient serial communications between peripheral devices or other MCUs. The SIOP is implemented as a 3-wire master/slave system with: • ...
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... SPE 8-BIT SDO STATUS SHIFT REGISTER SDI REGISTER $0C $0B SCK Figure 9-1. SIOP Block Diagram Figure 9-2). Data is captured at the SDI pin on the Serial Input/Output Ports (SIOP) Go to: www.freescale.com SDO/PB5 I/O CONTROL LOGIC SDI/PB6 SCK/PB7 MC68HC05P18A ...
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... Prior to enabling the SIOP, PB5 can be initialized to determine the beginning state. While the SIOP is enabled, PB5 cannot be used as a standard output since that pin is connected to the last stage of the SIOP serial shift register. A mask option is included to allow the data to MC68HC05P18A For More Information On This Product, BIT 2 BIT 3 ...
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... SIOP data register (SDR) located at address $000C shows the position of each bit in the register and indicates $000A Bit SPE MSTR Unimplemented Figure 9-3. SIOP Control Register (SCR) Serial Input/Output Ports (SIOP) Go to: www.freescale.com Figure 9- Bit MC68HC05P18A ...
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... SPE bit. Clearing the MSTR bit will abort any transfers that may have been in progress. Reset clears the MSTR bit, placing the SIOP subsystem in slave mode. MC68HC05P18A For More Information On This Product, 1. Abort the transmission 2. Reset the serial bit counter 3 ...
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... For More Information On This Product, shows the position of each bit in the register and indicates $000B Bit SPIF DCOL Unimplemented Figure 9-4. SIOP Status Register (SSR) Serial Input/Output Ports (SIOP) Go to: www.freescale.com Bit MC68HC05P18A ...
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... DCOL bit will be set. Writing to the SDR while a transfer is in progress can cause invalid data to be transmitted and/or received. Figure 9-5 not affected by reset. Address: Read: Write: Reset: MC68HC05P18A For More Information On This Product, shows the position of each bit in the register. This register is $000C Bit ...
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... Freescale Semiconductor, Inc. Serial Input/Output Ports (SIOP) Technical Data For More Information On This Product, Serial Input/Output Ports (SIOP) Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 10.1 Contents 10.2 10.3 10.4 10.2 Introduction The electrically erasable programmable read-only memory (EEPROM) is located at address $0140 and consists of 128 bytes. Programming the EEPROM can be done by the user on a single byte basis by manipulating the programming register, located at address $001C. ...
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... CPEN ER1 Unimplemented Table 10-1 Table 10-1. Erase Mode Select ER1 ER0 EEPROM Go to: www.freescale.com Bit 0 ER0 LATCH EERC EEPGM shows the modes Mode Program, no erase Byte erase Block erase Bulk erase MC68HC05P18A ...
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... LATCH = 1. If LATCH is not set, EEPGM cannot be set. LATCH and EEPGM cannot both be set with one write if LATCH is cleared. EEPGM is cleared automatically when LATCH is cleared. Reset clears this bit. MC68HC05P18A For More Information On This Product allow the RC oscillator to stabilize. RCON EEPROM Go to: www ...
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... Set EEPGM for a time, t Technical Data For More Information On This Product, EEPGM If PB • — Program the new data over the existing data without erasing it first • — Erase byte before programming. . EBYT EBLOCK EEPROM Go to: www.freescale.com . . MC68HC05P18A ...
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... To terminate the programming or erase sequence, clear EEPGM, delay for a time, t LATCH and CPEN to free up the buses. Following each erase or programming sequence, clear all programming control bits. MC68HC05P18A For More Information On This Product, . EBULK , to allow the programming voltage to fall, and then clear ...
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... Freescale Semiconductor, Inc. EEPROM Technical Data For More Information On This Product, EEPROM Go to: www.freescale.com MC68HC05P18A ...
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... Introduction The MC68HC05P18A includes a 4-channel, multiplexed input, 8-bit, successive approximation analog-to-digital (A/D) converter. The A/D subsystem shares its inputs with port C pins PC3–PC7. MC68HC05P18A For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 Analog Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Ratiometric Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Reference Supply Voltage (V Accuracy and Precision . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Conversion Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Digital Section ...
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... For ratiometric should be at the same potential as the supply REFH . SS ) REFH pin internally and V ; however, the accuracy of conversions REFH Analog-to-Digital (A/D) Converter Go to: www.freescale.com supplying the high REFH produces a REFH can be any REFH = 1/2 LSB (least MC68HC05P18A ...
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... Since the internal RC oscillator is running asynchronously with 2. Electrical noise slightly degrades the accuracy of the A the PH2 clock is 1 MHz or greater (for example, external MC68HC05P18A For More Information On This Product, respect to the PH2 clock, the conversion complete (CC) bit in the A/D status and control register (ADSC) must be used to determine when a conversion sequence has been completed ...
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... CC bit. Technical Data For More Information On This Product, Oscillator selection Analog subsystem power Input channel selection 11-1. $001E Bit ADON Unimplemented R Analog-to-Digital (A/D) Converter Go to: www.freescale.com Bit 0 0 CH2 CH1 CH0 Reserved MC68HC05P18A ...
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... C pin reads as a logic 0. The remaining port C pins read normally. To digitally read a port C pin, the A/D subsystem must be disabled (ADON = 0) or input channel 5–7 must be selected. MC68HC05P18A For More Information On This Product, to stabilize before accurate conversion results can be attained. Table 11-1. A/D Multiplexer Input ...
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... When the oscillator resumes operation upon leaving the stop mode, a finite amount of time passes before the A/D subsystem stabilizes sufficiently to provide conversions at its rated accuracy. The delays built into the MC68HC05P18A when coming out of stop mode are sufficient for this purpose. No explicit delays need to be added to the application software. ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 12.1 Contents 12.2 12.3 12.3.1 12.3.2 12.3.3 12.3.4 12.3.5 12.3.6 12.3.7 12.3.8 12.4 12.4.1 12.4.2 12.4.3 12.4.4 12.4.5 12.5 MC68HC05P18A For More Information On This Product, Section 12. Instruction Set Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Immediate .99 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Extended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Indexed, No Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Indexed, 8-Bit Offset .100 Indexed,16-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Relative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Register/Memory Instructions .102 Read-Modify-Write Instructions ...
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... The eight addressing modes are: • • • • • • • • Technical Data For More Information On This Product, Inherent Immediate Direct Extended Indexed, no offset Indexed, 8-bit offset Indexed, 16-bit offset Relative Instruction Set Go to: www.freescale.com MC68HC05P18A ...
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... When using the Motorola assembler, the programmer does not need to specify whether an instruction is direct or extended. The assembler automatically selects the shortest form of the instruction. MC68HC05P18A For More Information On This Product, Instruction Set Go to: www.freescale.com ...
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... Indexed, 16-bit offset instructions are useful for selecting the kth element in an n-element table anywhere in memory. As with direct and extended addressing, the Motorola assembler determines the shortest form of indexed addressing. Technical Data For More Information On This Product, Instruction Set Go to: www.freescale.com MC68HC05P18A ...
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... Instruction Types The MCU instructions fall into five categories: • • • • • MC68HC05P18A For More Information On This Product, Register/memory instructions Read-modify-write instructions Jump/branch instructions Bit manipulation instructions Control instructions Instruction Set Go to: www ...
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... Subtract memory byte and carry bit from accumulator Store accumulator in memory Store index register in memory Subtract memory byte from accumulator Instruction Set Go to: www.freescale.com Mnemonic ADC ADD AND BIT CMP CPX EOR LDA LDX MUL ORA SBC STA STX SUB MC68HC05P18A ...
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... These instructions read a memory location or a register, modify its contents, and write the modified value back to the memory location or to the register. NOTE: Do not use read-modify-write operations on write-only registers. MC68HC05P18A For More Information On This Product, Table 12-2. Read-Modify-Write Instructions Instruction Arithmetic shift left (same as LSL) ...
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... The span of branching is from –128 to +127 from the address of the next location after the branch instruction. The CPU also transfers the tested bit to the carry/borrow bit of the condition code register. Technical Data For More Information On This Product, Instruction Set Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. MC68HC05P18A For More Information On This Product, Table 12-3. Jump and Branch Instructions Instruction Branch if carry bit clear Branch if carry bit set Branch if equal Branch if half-carry bit clear Branch if half-carry bit set Branch if higher Branch if higher or same Branch if IRQ pin high ...
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... CPU can also test and branch based on the state of any bit in any of the first 256 memory locations. Technical Data For More Information On This Product, Table 12-4. Bit Manipulation Instructions Instruction Bit clear Branch if bit clear Branch if bit set Bit set Instruction Set Go to: www.freescale.com Mnemonic BCLR BRCLR BRSET BSET MC68HC05P18A ...
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... Freescale Semiconductor, Inc. 12.4.5 Control Instructions These instructions act on CPU registers and control CPU operation during program execution. MC68HC05P18A For More Information On This Product, Table 12-5. Control Instructions Instruction Clear carry bit Clear interrupt mask No operation Reset stack pointer Return from interrupt Return from subroutine ...
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... DIR (b7 — — — — — REL — — — — — REL — — — — — REL — — — — — REL REL — — — — — REL MC68HC05P18A ...
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... Branch Never BRSET n opr rel Branch if Bit n Set BSET n opr Set Bit n BSR rel Branch to Subroutine CLC Clear Carry Bit CLI Clear Interrupt Mask MC68HC05P18A For More Information On This Product, Description PC (PC rel ? IRQ = 1 PC (PC rel ? IRQ = 0 (A) (M) PC (PC rel ? ...
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... C8 4 — — — IX2 IX1 DIR 3C 5 INH 4C 3 — — — INH 5C 3 IX1 DIR EXT — — — — — IX2 IX1 MC68HC05P18A ...
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... Logical OR Accumulator with Memory ORA opr,X ORA opr,X ORA ,X ROL opr ROLA ROLX Rotate Byte Left through Carry Bit ROL opr,X ROL ,X MC68HC05P18A For More Information On This Product, Description PC (PC Push (PCL); SP (SP) – 1 Push (PCH); SP (SP) – ...
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... — — — IX2 IX1 IMM DIR EXT C0 4 — — IX2 IX1 — 1 — — — INH 83 0 — — — — — INH 97 2 MC68HC05P18A ...
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... Indexed, no offset addressing mode IX1 Indexed, 8-bit offset addressing mode IX2 Indexed, 16-bit offset addressing mode M Memory location N Negative flag n Any bit MC68HC05P18A For More Information On This Product, Description (M) – $00 A (X) opr Operand (one or two bytes) PC Program counter PCH Program counter high byte ...
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... Freescale Semiconductor, Inc. Instruction Set Technical Data For More Information On This Product, Instruction Set Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 13.1 Contents 13.2 13.3 13.4 13.5 13.6 13.7 13.8 13.9 13.10 PD5 Clock Out Timing (PD5 Clock Out Option Enabled .122 13.11 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123 MC68HC05P18A For More Information On This Product, Section 13. Electrical Specifications Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116 Operating Temperature Range .116 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116 Power Considerations .117 DC Electrical Characteristics ...
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... Go to: www.freescale.com within the range Out Value Unit V –0 –0 +0 –65 to +150 STG for guaranteed Symbol Value Unit + –40 to +85 –40 to +125 T 150 J Symbol Value Unit 60 C MC68HC05P18A ...
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... I/O For most applications, P Ignoring P Solving equations (1) and (2) for K gives: where constant pertaining to the particular part. K can be determined from equation (3) by measuring P known T by solving equations (1) and (2) iteratively for any value of T MC68HC05P18A For More Information On This Product ...
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... Max Unit — 0 –0.1 — –0.8 — — 0 — — 3.5 mA — 2.5 mA — — 4.5 mA — 4.6 mA — — 200 A — — — — — 8 Continued MC68HC05P18A ...
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... Active Reset Characteristics Rise Time Fall Time Note 4.5 Vdc Vdc MC68HC05P18A For More Information On This Product, (1) Symbol V = – +125 C, unless otherwise noted. All values shown reflect average OSC2 L = 0.2 Vdc –0.2 Vdc IL IH ...
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... Hex Hex (Note 3) — REFH = 0 Vdc +125 C, unless otherwise noted A Electrical Specifications Go to: www.freescale.com Comments Including quantization A/D accuracy may decrease proportionately REFH reduced below 4 REFH MC68HC05P18A ...
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... SDI hold time 5.0 Vdc 10 Vdc OSC CYC OP MC68HC05P18A For More Information On This Product, BIT 1 ... BIT 0 BIT 1 ... 6 Figure 13-1. SIOP Timing Diagram ( +125 C, unless otherwise noted A Electrical Specifications Go to: www.freescale.com Electrical Specifications ...
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... Minimum rise and fall times assume 55% duty cycle. Technical Data For More Information On This Product, (1) (2) (4) Figure 13-2. PD5 Clock Out Timing Characteristic Symbol Electrical Specifications Go to: www.freescale.com (3) (5) Min Max Unit t ns CYC 3 7.5 27 — Maximum rise and DD MC68HC05P18A ...
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... Vdc – +125 C, unless otherwise noted The minimum period should not be less than the number of cycles it takes to execute the interrupt service routine ILIL plus CYC MC68HC05P18A For More Information On This Product, (1) Symbol f OSC CYC t OXON ...
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... Freescale Semiconductor, Inc. Electrical Specifications Technical Data For More Information On This Product, Electrical Specifications Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 14.1 Contents 14.2 14.3 14.4 14.2 Introduction This section provides package dimension drawings for the 28-pin plastic dual in-line (PDIP) or 28-pin small outline (SOIC) packages. To make sure that you have the latest case outline specifications, contact: • • • ...
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... TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 17.80 18.05 0.701 0.711 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 F 1.27 BSC 0.050 BSC G J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 MC68HC05P18A ...
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... Freescale Semiconductor, Inc. Technical Data — MC68HC05P18A 15.1 Contents 15.2 15.3 15.2 Introduction This section contains instructions for ordering the MC68HC05P18A. 15.3 MC Order Numbers Table 15-1 types. MC68HC05P18AP (standard) MC68HC05P18ADW (standard) MC68HC05P18ACP (extended) MC68HC05P18ACDW (extended) MC68HC05P18AMP (automotive) MC68HC05P18AMDW (automotive Plastic dual in-line package DW = Small outline (wide body) package ...
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... Freescale Semiconductor, Inc. Ordering Information Technical Data For More Information On This Product, Ordering Information Go to: www.freescale.com MC68HC05P18A ...
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... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Go to: www.freescale.com MC68HC05P18A/D ...