mc68hc705j2 Freescale Semiconductor, Inc, mc68hc705j2 Datasheet - Page 16

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mc68hc705j2

Manufacturer Part Number
mc68hc705j2
Description
8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.1 I/O Port Function
MC68HC705J2
This section describes the two bidirectional I/O ports.
The 14 I/O pins form two I/O ports. Each I/O pin is programmable as an input or
an output. The contents of a port data direction register (DDR) determine the
data direction for the port. Writing a 1 to a DDR bit enables the output buffer for
the associated port pin; a 0 disables the output buffer. A reset initializes all
implemented DDR bits to 0, configuring all I/O pins as inputs.
A reset does not initialize the two port data registers. The port data registers for
ports A and B are at addresses $0000 and $0001. To avoid undefined levels,
write the data registers before writing the data direction registers.
With an I/O port pin programmed as an output, reading the pin actually reads
the value of the output data latch and not the voltage on the pin itself. When a
pin is programmed as an input, reading the port bit reads the voltage level on
the I/O pin. The output data latch can always be written, regardless of the state
of its DDR bit. Refer to Figure 3-1 for typical port circuitry, and to Table 3-1 for a
summary of I/O pin functions.
Connect any unused inputs and I/O pins to an appropriate logical
level, either V
termination
possibility of electrostatic damage.
for proper
DD
or V
PARALLEL I/O
SECTION 3
SS
PARALLEL I/O
. Although the I/O ports do not require
operation,
N O T E
termination
reduces
MOTOROLA
the
3-1

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