mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 126

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mc68hc705v12

Manufacturer Part Number
mc68hc705v12
Description
M68hc05-based Mcu Hc05 Freescale Semiconductor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
EPROM and EEPROM
12.7 Mask Option Register
Advance Information
NOTE:
Address:
The mask option register (MOR) is used to select all mask options
available on the MC68HC705V12. When in the erased state, the
EPROM cells will read as a logic zero which will, therefore, represent the
value transferred from the MOR at reset if it is left unprogrammed. The
unimplemented bits of this register are read as 0.
Options are disabled while the MOR is programmed (MORON = ELAT =
EPGM = 1 in EPROM programming register).
LVRE — Low-Voltage Reset Enable Bit
STOPE — STOP Instruction Enable Bit
LEVEL — Interrupt Request Pin Sensitivity Bit
COPE — COP Timer Enable Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = LVR enabled
0 = LVR disable
1 = Stop mode enabled
0 = Stop mode disabled; if STOP instruction is executed, a chip
1 = IRQ/V
0 = IRQ/V
0 = COP timer enabled
1 = COP timer disabled
$3C00
BIt 7
reset will result.
0
0
Go to: www.freescale.com
Figure 12-3. Mask Option Register (MOR)
EPROM and EEPROM
= Unimplemented
PP
PP
6
0
0
pin is both negative edge and level sensitive.
pin is negative edge sensitive only.
5
0
0
LVRE
4
0
3
0
0
MC68HC705V12
STOPE
2
0
LEVEL
1
0
Rev. 3.0
COPE
Bit 0
0

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