mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 72

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mc68hc705v12

Manufacturer Part Number
mc68hc705v12
Description
M68hc05-based Mcu Hc05 Freescale Semiconductor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Resets
5.4.2.4 COP Watchdog Timer Considerations
Advance Information
The COP watchdog timer is active in user mode if enabled by the
MOR[COPEN] bit. If the COP watchdog timer is selected, any execution
of the STOP instruction (either intentional or inadvertent due to the CPU
being disturbed) will cause the oscillator to halt and prevent the COP
watchdog timer from timing out. Therefore, it is recommended that the
STOP instruction should be disabled if the COP watchdog timer is
enabled.
If the COP watchdog timer is selected, the COP will reset the MCU when
it times out. Therefore, it is recommended that the COP watchdog
should be disabled for a system that must have intentional uses of the
wait mode for periods longer than the COP timeout period.
The recommended interactions and considerations for the COP
watchdog timer, STOP instruction, and WAIT instruction are
summarized in
Converted to reset
Converted to reset
STOP Instruction
Freescale Semiconductor, Inc.
Acts as STOP
For More Information On This Product,
Table 5-1. COP Watchdog Timer Recommendations
IF These Conditions Exist:
Go to: www.freescale.com
Table
Resets
WAIT time MORE than
5-1.
Any length WAIT time
WAIT time less than
COP timeout
COP tmeout
WAIT Time
THEN the COP Watchdog
Disable COP by the MOR
Disable COP by the MOR
MC68HC705V12
Enable or disable COP
Timer Should:
by the MOR
Rev. 3.0

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