mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 110

• Manufacturer Part Number: mc68hc708mp16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock Generator Module (CGM)
Technical Data
110
The following conditions apply when the PLL is in automatic bandwidth
control mode:
The PLL also may operate in manual mode (AUTO = 0). Manual mode
is used by systems that do not require an indicator of the lock condition
for proper operation. Such systems typically operate well below f
and require fast start-up. The following conditions apply when in manual
mode:
•
•
•
•
•
•
•
•
•
•
The ACQ bit (see
read-only indicator of the mode of the filter. (See
Acquisition and Tracking
The ACQ bit is set when the VCO frequency is within a certain
tolerance, ∆
a certain tolerance, ∆
Specifications
The LOCK bit is a read-only indicator of the locked state of the
PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance, ∆
of a certain tolerance, ∆
Specifications
CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s
lock condition changes, toggling the LOCK bit. (See
Control
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
Specifications), after turning on the PLL by setting PLLON in the
PLL control register (PCTL).
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
Clock Generator Module (CGM)
Register.)
TRK
LOCK
ACQ
, and is cleared when the VCO frequency is out of
for more information.)
for more information.)
(see
, and is cleared when the VCO frequency is out
8.6.2 PLL Bandwidth Control
UNT
8.10 Acquisition/Lock Time
UNL
. (See
. (See
Modes.)
8.10 Acquisition/Lock Time
AL
8.10 Acquisition/Lock Time
, after entering tracking mode
MC68HC708MP16
Freescale Semiconductor
8.4.2.2
Register) is a
8.6.1 PLL
—
BUSMAX
Rev. 3.1