mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 320

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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mc68hc708mp16CFU
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Input/Output (I/O) Ports
15.3 Port A
15.3.1 Port A Data Register
15.3.2 Data Direction Register A
Technical Data
320
Address:
Address:
Port A is an 8-bit general-purpose bidirectional I/O port.
The port A data register (PTA) contains a data latch for each of the eight
port A pins.
PTA[7:0] — Port A Data Bits
Data direction register A (DDRA) determines whether each port A pin is
an input or an output. Writing a logic 1 to a DDRA bit enables the output
buffer for the corresponding port A pin; a logic 0 disables the output
buffer.
Reset:
Reset:
Read:
Write:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
DDRA7
$0000
$0004
PTA7
Bit 7
Bit 7
0
Figure 15-3. Data Direction Register A (DDRA)
Figure 15-2. Port A Data Register (PTA)
Input/Output (I/O) Ports
DDRA6
PTA6
6
6
0
DDRA5
PTA5
5
5
0
Unaffected by reset
DDRA4
PTA4
4
4
0
DDRA3
PTA3
3
3
0
MC68HC708MP16
DDRA2
PTA2
Freescale Semiconductor
2
2
0
DDRA1
PTA1
1
1
0
Rev. 3.1
DDRA0
PTA0
Bit 0
Bit 0
0

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