mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 363

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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19.8.2 ADC Data Register
19.8.3 ADC Clock Register
MC68HC708MP16
Freescale Semiconductor
Rev. 3.1
Address:
Address:
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
This register selects the clock frequency for the ADC.
ADIV2:ADIV0 — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
Table 19-2
should be set to 1 MHz.
$001A
ADIV2
$0019
Bit 7
AD7
Bit 7
Analog-to-Digital Converter (ADC)
0
0
Figure 19-4. ADC Clock Register (ADCLKR)
shows the available clock configurations. The ADC clock
Figure 19-3. ADC Data Register (ADR)
= Unimplemented
= Unimplemented
ADIV1
AD6
6
0
6
0
ADIV0
AD5
5
0
5
0
ADCLK
AD4
4
0
4
0
AD3
3
0
3
0
0
Analog-to-Digital Converter (ADC)
AD2
2
0
2
0
0
AD1
1
0
1
0
0
Technical Data
Bit 0
Bit 0
AD0
0
0
0
363

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