mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 388

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mc68hc708mp16

Manufacturer Part Number
mc68hc708mp16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Glossary
Technical Data
388
I — The interrupt mask bit in the condition code register of the CPU08.
index register (H:X) — A 16-bit register in the CPU08. The upper byte
input/output (I/O) — Input/output interfaces between a computer
instructions — Operations that a CPU can perform. Instructions are
interrupt — A temporary break in the sequential execution of a program
interrupt request — A signal from a peripheral to the CPU intended to
I/O — See input/output (I/0).
IRQ — See external interrupt module (IRQ).
jitter — Short-term signal instability.
latch — A circuit that retains the voltage level (logic 1 or logic 0) written
latency — The time lag between instruction completion and data
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage
When I is set, all interrupts are disabled.
of H:X is called H. The lower byte is called X. In the indexed
addressing modes, the CPU uses the contents of H:X to determine
the effective address of the operand. H:X can also serve as a
temporary data storage location.
system and the external world. A CPU reads an input to sense the
level of an external signal and writes to an output to change the level
on an external signal.
expressed by programmers as assembly language mnemonics. A
CPU interprets an opcode and its associated operand(s) and
instruction.
to respond to signals from peripheral devices by executing a
subroutine.
cause the CPU to execute a subroutine.
to it for as long as power is applied to the circuit.
movement.
(V
DD
).
Glossary
MC68HC708MP16
Freescale Semiconductor
Rev. 3.1

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