mc68hc711d3 Freescale Semiconductor, Inc, mc68hc711d3 Datasheet - Page 115

• Manufacturer Part Number: mc68hc711d3
• Description: M Hc11 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

9.8 Expansion Bus Timing
Freescale Semiconductor
Num
1. V
2. Input clocks with duty cycles other than 50% affect bus performance. Timing parameters affected by input clock duty cycle
3. Formula only for dc to 2 MHz.
4A
4B
12
17
18
19
21
22
24
25
26
27
28
29
35
36
1
2
3
9
otherwise noted.
are identified by (a) and (b). To recalculate the approximate bus timing values, substitute the following expressions in place
of 1/8 t
Where:
DD
Frequency of operation (E-clock frequency)
Cycle time
Pulse width, E low, PW
Pulse width, E high, PW
E and AS rise time
E and AS fall time
Address hold time
Non-muxed address valid time to E rise
Read data setup time
Read data hold time (max = t
Write data delay time, t
Write data hold time, t
Muxed address valid time to E rise
Muxed address valid time to AS fall
Muxed address hold time, t
Delay time, E to AS rise, t
Pulse width, AS high, PW
Delay time, AS to E rise, t
MPU address access time
MPU access time , t
Muxed address delay (previous cycle MPU read)
(a) (1-dc) × 1/4 t
(b) dc × 1/4 t
DC is the decimal value of duty cycle percentage (high time).
= 5.0 Vdc ± 10%, V
t
t
t
t
t
AV
AVM
ASL
ACCA
MAD
CYC
= PW
= PW
= PW
= t
= t
in the above formulas, where applicable:
ASD
cyc
EL
ASH
EL
CYC
– (t
– (PW
+ 30 ns
– (t
– 70 ns
ASD
CYC
(2)a
ASD
EL
ACCE
SS
, t
+ 80 ns)
(2)a(3)
DHW
– t
+ 90 ns)
Characteristic
EL
DDW
AH
EH
= 0 Vdc, T
AVM
ASD
ASH
ASED
= PW
= 1/2 t
(2)a
= 1/8 t
= 1/8 t
AHL
= 1/2 t
= 1/8 t
) – t
MAD
(2)a
= 1/8 t
= 1/4 t
(2)a
= 1/8 t
= 1/8 t
EH
cyc
DSR
cyc
)
cyc
cyc
cyc
– t
A
— 23 ns
– 29.5 ns
cyc
cyc
= T
– 29.5 ns
– 28 ns
– t
DSR
MC68HC711D3 Data Sheet, Rev. 2.1
+ 65.5 ns
cyc
cyc
(1)
f
– 9.5 ns
– 29 ns
L
– 29.5 ns
– 9.5 ns
to T
H
(2)a
. All timing is shown with respect to 20% V
(2)a
(2)a
(2)b
(2)b
Symbol
PW
PW
PW
t
t
t
t
t
t
t
t
t
t
ACCA
ACCE
t
ASED
t
DDW
DHW
t
DSR
DHR
AVM
MAD
t
t
AHL
ASD
ASL
f
cyc
AH
AV
t
t
O
r
f
ASH
EH
EL
281.5
271.5
115.5
115.5
744.5
145.5
1000
95.5
95.5
95.5
Min
477
472
151
221
30
dc
—
—
—
—
0
1.0 MHz
145.5
190.5
Max
442
1.0
20
20
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
Min Max Min Max
500
227
222
307
33
94
30
33
84
26
33
53
96
53
83
2.0 MHz
dc
—
—
—
—
0
and 70% V
Expansion Bus Timing
128
192
2.0
—
—
—
20
20
—
—
—
83
—
—
—
—
—
—
—
—
—
333
146
141
196
dc
26
54
30
26
54
13
31
31
63
31
51
3.0 MHz
—
—
—
—
DD
0
, unless
111
3.0 MHz
20
15
51
71
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
115