pal22v10-7 Advanced Micro Devices, pal22v10-7 Datasheet
pal22v10-7
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pal22v10-7 Summary of contents
Page 1
... The PAL22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count. The PAL22V10 device implements the familiar Boolean logic transfer function, the sum of products. The PAL de- vice is a programmable AND array driving a fixed OR array. The AND array is programmed to create custom product terms, while the OR array sums selected terms at the outputs ...
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... Input/Output Connect V = Supply Voltage CC 2-198 V CC I 16559C-2 PAL22V10 Family PLCC/LCC I I/O I 16559C ...
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... Valid Combinations lists configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. PAL22V10-7/10/15, AmPAL22V10A (Com’l) AMD OPTIONAL PROCESSING Blank = Standard Processing OPERATING CONDITIONS C = Commercial ( +75 C) ...
Page 4
... HIGH state; product terms connected to both true and complement of any single input assume the logical LOW state. The PAL22V10 has 12 inputs and 10 I/O macrocells. The macrocell (Figure 1) allows one of four potential out- put configurations; registered output or combinatorial I/O, active high or active low (see Figure 2). The configu- ration choice is made according to the user’ ...
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... Registered Output Configuration Each macrocell of the PAL22V10 includes a D-type flip- flop for data storage and synchronization. The flip-flop is loaded on the LOW-to-HIGH transition of the clock in- put. In the registered configuration (S feedback is from Q of the flip-flop CLK SP Registered/Active Low CLK ...
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... Approved programmers are listed at the end of this data book. 2-202 Quality and Testability The PAL22V10 offers a very high level of built-in quality. Extra programmable fuses, test words and test columns provide a means of verifying performance of all AC and DC parameters. In addition, this verifies complete ...
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... (13 GND 12 (14 PAL22V10 Family AMD 24 (28 (27 ...
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... OUT (Note 0 Max (Note 3) OUT Outputs Open ( Max CC and I (or I and OZL IH OZH PAL22V10-7 (Com’ + +4. +5.25 V Min Max 2.0 0.8 –1.2 25 Input –100 CLK –150 1 100 – ...
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... CF = 1/f MAX (internal feedback) – Test Conditions 2.0 V OUT MHz 1/( 1/( (Note 6) CNT S CF 1/( PAL22V10-7 (Com’l) AMD Typ Unit Min (Note 3) Max Unit 1 7 ...
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... OUT (Note 0 Max (Note 3) OUT Outputs Open ( Max CC and I (or I and OZL IH OZH PAL22V10-10 (Com’ + +4. +5.25 V Min Max 2.0 0.8 –1.2 25 –100 Input –150 CLK 1 100 – ...
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... CF = 1/f MAX (internal feedback) – Test Conditions 2.0 V OUT MHz 1/( 1/( (Note 5) CNT S CF 1/( PAL22V10-10 (Com’l) AMD Typ Unit Min (Note 3) Max Unit ...
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... OUT (Note 0 Max (Note 3) OUT Outputs Open ( Max CC and I (or I and OZL IH OZH PAL22V10-15 (Com’ + +4. +5.25 V Min Max 2.0 0.8 –1.2 25 –100 1 100 –100 –30 – ...
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... CF = 1/f MAX (internal feedback) – Test Conditions MHz V = 2.0 V OUT 1/( 1/( (Note 5) CNT S CF 1/( PAL22V10-15 (Com’l) AMD Typ Unit Min (Note 3) Max Unit ...
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... OUT (Note 0 Max (Note 3) OUT Outputs Open ( Max CC and I (or I and OZL IH OZH AmPAL22V10A (Com’ + +4. +5.25 V Min Max 2.0 0.8 –1.2 25 –100 1 100 –100 –30 – ...
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... These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where frequency may be affected. Test Conditions MHz V = 2.0 V OUT 1/( AmPAL22V10A (Com’l) AMD Typ Unit Min Max Unit ...
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... PD Registered V T Output 16559C-7 Input or Feedback V T Output t WL 16559C-9 Input Asserting Synchronous V T Preset V Clock T t ARR Registered V T Output 16559C-11 PAL22V10 Family 16559C-8 Registered Output 0. 0.5V OL 16559C-10 ...
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... Apply Line is High- Impedance “Off” State KS000010-PAL Output Commercial 300 5 pF PAL22V10 Family AMD Test Point 16559C-13 Measured R Output Value 2 All except -7: 1.5 V 390 1 – 0 300 0 2-213 ...
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... AMD MEASURED SWITCHING CHARACTERISTICS for the PAL22V10- 4. (Note Note: 1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where t PD may be affected. ...
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... INPUT/OUTPUT EQUIVALENT SCHEMATICS Input Program/Verify Circuitry Typical Input 40 NOM Input, I/O Pins Typical Output PAL22V10 Family AMD V CC 16559C- Output Program/Verify/ Test Circuitry Preload Circuitry 16559C-17 2-215 ...
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... CC Following reset, the clock input must not be driven from LOW to HIGH until all applicable input and feed- back setup times are met Power-Up Reset Waveform PAL22V10 Family Max Unit 1000 ns See Switching Characteristics V CC 16559C-18 ...