isp1760 NXP Semiconductors, isp1760 Datasheet - Page 25

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isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
9397 750 13257
Product data sheet
7.9 Power-on reset (POR)
Figure 7
When V
(t
(1.2 V).
To give a better view of the functionality,
dips at t2–t3 and t4–t5. If the dip at t4–t5 is too short (that is, < 11 s), the internal POR
pulse will not react and will remain LOW. The internal POR starts with a 1 at t0. At t1, the
detector will see the passing of the trip level and a delay element will add another t
before it drops to 0.
The internal POR pulse will be generated whenever V
than 11 s.
The RESET_N pin can be either connected to V
externally controlled (by the microcontroller, ASIC, and so on).
availability of the clock with respect to the external POR.
Fig 7. Most commonly used power supply connection.
PORP
Fig 8. Internal power-on reset timing.
) will be typically 800 ns. The pulse is started when V
CC(5V0)
(1) PORP = power-on reset pulse.
shows the most commonly used power supply connection.
t0
is directly connected to the RESET_N pin, the internal POR pulse width
t1
t
PORP
Rev. 01 — 8 November 2004
94, 104, 115
ISP1760
40, 48, 59,
67, 75, 83,
5, 50, 118
004aaa534
6, 7, 10,
85
9
V
V
V
V
CC(5V0)
REG(1V8)
REG(1V8)
REG(3V3)
t2
10 µF
Figure 8
, V
CC(I/O )
Embedded Hi-Speed USB host controller
t3
t
PORP
CC(I/O)
10 µF
shows a possible curve of V
100 nF
100 nF
CC(5V0)
(using the internal POR circuit) or
100 nF
t4
100 nF
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CC(5V0)
3.3 V
t5
drops below V
Figure 9
004aaa584
rises above V
shows the
V
V
PORP
ISP1760
CC(5V0)
TRIP
TRIP
(1)
CC(5V0)
for more
TRIP
25 of 105
PORP
with

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