isp1760 NXP Semiconductors, isp1760 Datasheet - Page 45

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isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
[1]
Table 46:
[1]
9397 750 13257
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
The reserved bits should always be written with the reset value.
Edge Interrupt Count register: bit allocation
8.3.9 Edge Interrupt Count register (R/W: 0340h)
R/W
R/W
R/W
R/W
R/W
R/W
15
31
23
15
0
7
0
0
0
0
7
0
Table 45:
Table 46
Bit
31 to 18
17 to 16
15 to 0
R/W
R/W
R/W
R/W
R/W
R/W
14
30
22
14
0
6
0
0
0
0
6
0
shows the bit allocation of the register.
Memory register: bit description
Symbol
-
MEM_BANK_
SEL[1:0]
START_
ADDR_MEM_
READ[15:0]
R/W
R/W
R/W
R/W
R/W
R/W
13
29
21
13
0
5
0
0
0
0
5
0
Rev. 01 — 8 November 2004
START_ADDR_MEM_READ[15:8]
START_ADDR_MEM_READ[7:0]
Description
reserved
Memory Bank Select: Up to four memory banks can be selected.
For details on internal memory read description, see
Applicable to PIO mode memory read or write data transfers only.
Start Address for Memory Read Cycles: The start address for a
series of memory read cycles at incremental addresses in a
contiguous space. Applicable to PIO mode memory read data
transfers only.
NO_OF_CLK[15:8]
R/W
R/W
R/W
R/W
R/W
R/W
NO_OF_CLK[7:0]
MIN_WIDTH[7:0]
12
28
20
12
0
4
0
0
0
0
4
0
reserved
[1]
R/W
R/W
R/W
R/W
R/W
R/W
11
27
19
11
0
3
0
0
0
0
3
1
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
R/W
R/W
10
26
18
10
0
2
0
0
0
0
2
1
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
R/W
R/W
R/W
R/W
R/W
R/W
25
17
9
0
1
0
0
0
9
0
1
1
ISP1760
Section
R/W
R/W
R/W
R/W
R/W
R/W
7.3.1.
45 of 105
24
16
8
0
0
0
0
0
8
0
0
1

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