isp1760 NXP Semiconductors, isp1760 Datasheet - Page 52

no-image

isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
isp1760BE
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
isp1760BE
Quantity:
31
Part Number:
isp1760BE (LF)
Manufacturer:
PHI
Quantity:
20 000
Part Number:
isp1760BEGA
Manufacturer:
LEVELONE
Quantity:
450
Part Number:
isp1760BEGA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
isp1760BEGA
Manufacturer:
ST
Quantity:
20 000
Part Number:
isp1760BEGE
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
isp1760BEUM
Manufacturer:
JST
Quantity:
1 200
Part Number:
isp1760BEUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
isp1760BEUM
Manufacturer:
ST-ERICSSON
Quantity:
20 000
Part Number:
isp1760ET
Manufacturer:
ST
Quantity:
8
Part Number:
isp1760ET
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
isp1760ET
Manufacturer:
PHI-PB
Quantity:
5
Part Number:
isp1760ETUM
Manufacturer:
CSR
Quantity:
1 712
Part Number:
isp1760ETUM
Manufacturer:
ST-ERICSSON
Quantity:
20 000
Philips Semiconductors
[1]
9397 750 13257
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
INT_IRQ_E
R/W
R/W
15
0
7
0
Table 57:
Bit
31 to 10
9
8
7
6
5
READY _E
R/W
CLK
R/W
14
0
6
0
Interrupt Enable register: bit description
Symbol
-
ISO_IRQ_E ISO IRQ Enable: Controls the IRQ assertion because of completing
ATL_IRQ_E ATL IRQ Enable: Controls the IRQ assertion because of completing
INT_IRQ_E
CLKREADY
_E
HCSUSP_E Host Controller Suspend Enable: Enables the IRQ generation when
HCSUSP_
R/W
R/W
13
0
5
E
0
Rev. 01 — 8 November 2004
reserved
Description
reserved; write logic 0
one or more ISO PTDs matching the ISO IRQ Mask AND or
ISO IRQ Mask OR register bits combination.
0 — No IRQ will be asserted because of completing ISO PTDs
1 — IRQ will be asserted.
For details, see
one or more ATL PTDs matching the ATL IRQ Mask AND or
ATL IRQ Mask OR register bits combination.
0 — No IRQ will be asserted because of completing ATL PTDs
1 — IRQ will be asserted.
For details, see
INT IRQ Enable: Controls the IRQ assertion because of completing
one or more INT PTDs matching the INT IRQ Mask AND or
INT IRQ Mask OR register bits combination.
0 — No IRQ will be asserted because of completing INT PTDs
1 — IRQ will be asserted.
For details, see
Clock Ready Enable: Enables the IRQ assertion when internal clock
signals are running stable. Useful after power-on or wake-up.
0 — No IRQ will be generated after a CLKREADY_E event has
occurred
1 — IRQ will be generated after a CLKREADY_E event.
the Host Controller enters suspend mode.
0 — No IRQ will be generated because of the Host Controller entering
suspend mode
1 — IRQ will be generated at the Host Controller entering suspend
mode.
reserved
[1]
R/W
R/W
12
0
4
0
[1]
Section
Section
Section
DMAEOT
INT _E
R/W
R/W
11
0
3
0
Embedded Hi-Speed USB host controller
7.4.
7.4.
7.4.
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
reserved
ISO_IRQ_
[1]
R/W
R/W
E
9
0
1
0
ISP1760
SOFITLINT
ATL_IRQ
R/W
R/W
52 of 105
_E
_E
8
0
0
0

Related parts for isp1760