mfrc522 NXP Semiconductors, mfrc522 Datasheet

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mfrc522

Manufacturer Part Number
mfrc522
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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1. Introduction
2. General description
3. Features
This document describes the functionality of the contactless reader/writer MFRC522. It
includes the functional and electrical specifications.
The MFRC522 is a highly integrated reader/writer for contactless communication at 13.56
MHz. The MFRC522 reader supports ISO 14443A / MIFARE® mode.
The MFRC522’s internal transmitter part is able to drive a reader/writer antenna designed
to communicate with ISO/IEC 14443A/MIFARE
additional active circuitry. The receiver part provides a robust and efficient implementation
of a demodulation and decoding circuitry for signals from ISO/IEC 14443A/MIFARE
compatible cards and transponders. The digital part handles the complete
ISO/IEC 14443A framing and error detection (Parity & CRC).The MFRC522 supports
MIFARE
communication using MIFARE
Various host interfaces are implemented:
MFRC522
Contactless Reader IC
Rev. 3.2 — 22 May 2007
112132
Highly integrated analog circuitry to demodulate and decode responses
Buffered output drivers to connect an antenna with minimum number of external
components
Supports ISO/IEC 14443A / MIFARE
Typical operating distance in Reader/Writer mode for communication to a
ISO/IEC 14443A / MIFARE
Supports MIFARE
Supports ISO/IEC 14443A higher transfer speed communication up to 848 kbit/s
Support of the MFIN / MFOUT
Additional power supply to directly supply the smart card IC connected via MFIN /
MFOUT
Supported host interfaces
SPI interface
serial UART (similar to RS232 with voltage levels according pad voltage supply)
I
2
C interface.
®
Classic (e.g. MIFARE
®
Classic encryption in Reader/Writer mode
®
®
®
higher transfer speeds up to 848 kbit/s in both directions.
up to 50 mm depending on the antenna size and tuning
Standard) products. The MFRC522 supports contactless
®
®
cards and transponders without
Product data sheet
PUBLIC INFORMATION
®

Related parts for mfrc522

mfrc522 Summary of contents

Page 1

... The MFRC522 is a highly integrated reader/writer for contactless communication at 13.56 MHz. The MFRC522 reader supports ISO 14443A / MIFARE® mode. The MFRC522’s internal transmitter part is able to drive a reader/writer antenna designed to communicate with ISO/IEC 14443A/MIFARE additional active circuitry. The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO/IEC 14443A/MIFARE compatible cards and transponders ...

Page 2

... Hard reset with low power function Power-down mode per software Programmable timer Internal oscillator to connect 27.12 MHz quartz 2.5 - 3.3 V power supply CRC Co-processor Free programmable I/O pins Internal self test 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 3

... LOW RESET level detector bit RCVOff = bit RCVOff = 1 DD Continuous Wave . DD Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max Unit [1][2] 2.5 - 3.6 V [1][2] [1][2] [3] 1.6 - 3.6 V 1.6 - 3.6 V μA [ μA [ ...

Page 4

... Figure 34 “Packing Information 1 Tray” see Package Outline in Figure 33 “Package outline package version (HVQFN32)” see Packing Information in Figure 35 “Packing Information 5Tray” Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Version SOT617-1 SOT617-1 © NXP B.V. 2007. All rights reserved 109 ...

Page 5

... The comfortable FIFO buffer allows a fast and convenient data transfer from the host to the contactless UART and vice versa. Various host interfaces are implemented to fulfil different customer requirements. Analog Interface Fig 1. Simplified MFRC522 Block diagram 112132 Product data sheet Registerbank Contactless ...

Page 6

... MIFARE Classic Unit Random Number Generator Amplitude Rating Reference Voltage Analog Test MUX and DAC VMID AUX1,2 Fig 2. MFRC522 Block diagram 112132 Product data sheet SDA EA, I2C PVDD SPI, UART, I2C Interface Control State Machine Command Register Programable Timer Interrupt Control CRC16 Generation & ...

Page 7

... Mifare Signal Output 9 PWR MFIN / MFOUT Pad Power Supply: provides power to for the MFIN / MFOUT pads 10, 14 PWR Transmitter Ground: supplies the output stage of TX1 and TX2 Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC [1] © NXP B.V. 2007. All rights reserved 109 ...

Page 8

... Data Pins for different interfaces (test port, I [2] UART) 26 I/O 27 I/O 28 I/O 29 I/O 30 I External Address: This Pin is used for coding I2C Address Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC [2] 2 IC, SPI, Section 10 “DIGITAL Interfaces”. © NXP B.V. 2007. All rights reserved. [ 109 ...

Page 9

... NXP Semiconductors 8. Functional description MFRC522 transmission module supports the Reader/Writer mode for ISO/IEC 14443A/MIFARE Battery Fig 4. MFRC522 Reader/Writer mode. The following diagram communication diagram.” ISO14443A Reader RC522 Fig 5. ISO/IEC 14443A/MIFARE The communication overview in ISO/IEC 14443A/MIFARE Table 4: Communication direction Reader → Card ...

Page 10

... Card → Reader (MFRC522 receives data from a card) The contactless UART of MFRC522 and a dedicated external host are required to handle the complete MIFARE “Data Coding and framing according to ISO/IEC 14443A.” framing according to ISO/IEC 14443A / MIFARE®. ISO14443-A Framing at 106 kbit/s ...

Page 11

... NXP Semiconductors 9. MFRC522 Register SET 9.1 MFRC522 Registers Overview Table 5: Addr (hex) Page 0: Command and Status Page 1: Command Page 2: CFG 0 112132 Product data sheet MFRC522 Registers Overview ...

Page 12

... A B C-F 112132 Product data sheet MFRC522 Registers Overview …continued Register Name Function CRCResultReg Shows the actual MSB and LSB values of the CRC calculation Reserved Reserved for future use ModWidthReg Controls the setting of the ModWidth Reserved Reserved for future use ...

Page 13

... These register bits are reserved for future use or production test and shall not be changed. Reserved register (address 00h); reset value: 00h Description of Reserved register bits Description Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Table RFU © NXP B.V. 2007. All rights reserved. ...

Page 14

... Set to logic 1, the analog part of the receiver is switched off. PowerDown Set to logic 1, Soft Power-down mode is entered. Set to logic 0, the MFRC522 starts the wake up procedure. During this procedure this bit still shows a logic 1. A logic 0 indicates that the MFRC522 is ready for operations; see Power-down” ...

Page 15

... IRQ. Allows the error interrupt request (indicated by bit ErrIRq propagated to pin IRQ. Allows the timer interrupt request (indicated by bit TimerIRq propagated to pin IRQ. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 16

... IdleIRq is set. Starting the Idle Command by the μ-Controller does not set bit IdleIRq. Set to logic 1, when bit HiAlert in register Status1Reg is set. In opposition to HiAlert, HiAlertIRq stores this event and can only be reset as indicated by bit Set1. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 17

... Set to logic 1, when MFIN is active. This interrupt is set when either a rising or falling signal edge is detected. - Reserved for future use. CRCIRq Set to logic 1, when the CRC command is active and all data are processed. - Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC …continued CRCIRq RFU dy © ...

Page 18

... In this case, the antenna drivers are switched off automatically. - Reserved for future use. BufferOvfl Set to logic 1, if the host or a MFRC522’s internal state machine (e.g. receiver) tries to write data into the FIFO buffer although the FIFO buffer is already full. CollErr Set to logic bit-collision is detected cleared automatically at receiver start-up phase ...

Page 19

... CommIEnReg and DivIEnReg). TRunning Set to logic 1, if the MFRC522’s timer unit is running, e.g. the timer will decrement the TCounterValReg with the next timer clock. Remark: In the gated mode the bit TRunning is set to logic 1, when the timer is enabled by the register bits ...

Page 20

... Transmitting 100 RxWait: Wait until RF field is present, if the bit RxWaitRF is set to logic 1. The minimum time for RxWait is defined by the RxWaitReg register. 101 Wait for data 110 Receiving Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader MFCrypto1On Modem State RFU dy 2 ...

Page 21

... Reading this bit will always return 0. FIFOLevel Indicates the number of bytes stored in the FIFO buffer. Writing to the FIFODataReg increments, reading decrements the FIFOLevel. WaterLevelReg register (address 0Bh); reset value: 08h RFU Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader FIFOData ...

Page 22

... Reading this bit will always return 0. Set to logic 1 starts the timer immediately. Reading this bit will always return 0. Reserved for future use. Shows the number of valid bits in the last received byte the whole byte is valid. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Section 9.2.1 ...

Page 23

... This bit shall only be used during bitwise anticollision at 106 kbit/s, otherwise it shall be set to logic 1. Reserved for future use. Set to logic collision is detected or the position of the collision is out of the range of bits CollPos. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 24

... Description of Reserved register bits Description Reserved for future use. Reserved register (address 10h); reset value: 00h Description of Reserved register bits Description Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC nd bit st bit th bit RFU ...

Page 25

... RxModeReg and TxModeReg. Value Description 00 0000 01 6363 10 A671 11 FFFF TxModeReg register (address 12h); reset value: 00h TxSpeed r/w dy Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader PolMFin - CRCPreset r/w RFU InvMod - r/w RFU © NXP B.V. 2007. All rights reserved. ...

Page 26

... Description of TxModeReg bits Description Set to logic 1, this bit enables the CRC generation during data transmission. Remark: This bit shall only be set to logic 0 at 106 kbit/s. Defines the bit rate while data transmission. The MFRC522 handels transfer speeds up to 848 kbit/s. Value Description 000 ...

Page 27

... Set to logic 1, the output signal on pin TX2 will deliver the 13.56 MHz energy carrier modulated by the transmission data. Tx1RFEn Set to logic 1, the output signal on pin TX1 will deliver the 13.56 MHz energy carrier modulated by the transmission data. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 28

... DriverSel is set to tristate mode. 01 Modulation signal (envelope) from the internal coder, Miller Pulse Coded. 10 Modulation signal (envelope) from MIFIN 11 High Remark: The High level depends on the setting of InvTx1RFOn/ InvTx1RFOff and InvTx2RFOn/ InvTx2RFOff. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFU ...

Page 29

... RxWait bit-clocks. During this ‘frame guard time’ any signal at pin Rx is ignored.This parameter is ignored by the receive command. All other commands (e.g. Transceive, MFAuthent) use this parameter. The counter starts immediately after the external RF field is switched on. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 30

... Reserved for future use. Changes the time constant of the internal PLL during data reception. Remark: If set to 00b, the PLL is frozen during data reception. Changes the time constant of the internal PLL during burst. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 31

... RFU Description of MifNFCReg bits Symbol Description - Reserved for future use. TxWait These bits define the additional response time. Per default 7 bits are added to the value of the register bit. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFU ...

Page 32

... Description of SerialSpeedReg bits Symbol Description BR_T0 Factor BR_T0 to adjust the transfer speed, for description see 10.3.2 “Selection of the transfer BR_T1 Factor BR_T1 to adjust the transfer speed, for description see 10.3.2 “Selection of the transfer Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader r/w RFU 4 ...

Page 33

... CRCResultLSB Description of CRCResultReg lower bits Symbol Description CRCResultLSB This register shows the actual value of the least significant byte of the CRCResult register valid only if bit CRCReady in register Status1Reg is set to logic 1. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFU ...

Page 34

... The maximum value is half the bit period. Reserved register (address 25h); reset value: 87h Description of Reserved register bits Symbol Description - Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFU ModWidth ...

Page 35

... This may be used to regulate the modulation index. Remark: The conductance value is binary weighted. During soft Power-down mode the highest bit is forced to 1. This value is only used if the driver TX1 or Tx2 are switched on. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader ...

Page 36

... P-driver for the time of modulation. This may be used to regulate the modulation index. Remark: The conductance value is binary weighted. During soft Power-down mode the highest bit is forced Force100ASK is set to logic 1, the value of ModGsP has no effect. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader CWGsP ...

Page 37

... For detailed description see TPrescalerReg register (address 2Bh); reset value: 00h TPrescaler_Hi Description of TPrescalerReg bits Description The following formula is used to calculate 6.78 MHz/TPreScaler. Timer For detailed description see Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader TPrescaler_Hi r/w : Timer Section 13 “Timer Unit” ...

Page 38

... Description of lower TReloadReg bits Symbol Description TReloadVal_Lo Defines the lower 8 bits for the TReloadReg. With a start event the timer loads the TReloadVal. Changing this register affects the timer only at the next start event. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader r/w ...

Page 39

... Description TCounterVal_Hi Current value of the timer, higher 8 bits TCounterVal_Lo Symbol Description TCounterVal_Lo Current value of the timer, lower 8 bits Symbol Description - Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFU © ...

Page 40

... Starts and enables the PRBS15 sequence according ITU-TO150. Remark: All relevant registers to transmit data have to be configured before entering PRBS15 mode. The data transmission of the defined sequence is started by the send command. TestBusSel Selects the testbus. See Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader TstBusBitSel r/w ...

Page 41

... TestPinEn bits in register TestPinEnReg. Remark: Reading the register indicates the actual status of the pins UseIO is set to logic 1. If UseIO is set to logic 0, the value of the register TestPinValueReg is read back. - Reserved for future use. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader TestPinEn ...

Page 42

... The selftest is enabled by 1001b. Remark: For default operation the selftest has to be disabled by 0000b Symbol Description Version Indicates current version. Remark: The current version for MFRC522 is 90h or 91h. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader TestBus ...

Page 43

... Subcarrier detected 106 kbit/s: not applicable 212, 424 and 848 kbit/s: High during last part of Data and CRC. 1111 Test bus bit as defined by the TstBusBitSel in register TestSel1Reg. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader AnalogSelAux2 r/w Section 19 “Testsignals”. ...

Page 44

... Defines the testvalue for TestDAC2. The output of the DAC2 can be switched to AUX2 by setting AnalogSelAux2 to 0001b in register AnalogTestReg ADC_I r Symbol Description ADC_I Shows the actual value of ADC I channel. ADC_Q Shows the actual value of ADC Q channel. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader TestDAC1 r TestDAC2 r/w 4 ...

Page 45

... Reserved for production tests Symbol Description - Reserved for production tests Symbol Description - Reserved for production tests Symbol Description - Reserved for production tests. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader RFT RFT RFT ...

Page 46

... A serial peripheral interface (SPI compatible) is supported to enable high speed communication to the host. The SPI Interface can handle data speed Mbit/s. In the communication with a host MFRC522 acts as a slave receiving data from the external host for register settings and to send and receive data relevant for the communication on the RF interface ...

Page 47

... On both lines (MOSI, MISO) each data byte is sent by MSB first. Data on MOSI line should be stable on rising edge of the clock line and can changed on falling edge. The same is valid for the MISO line. Data is provided by the MFRC522 on falling edge and is stable during rising edge. ...

Page 48

... The MSB bit of the first byte defines the used mode. To read data from the MFRC522 the MSB bit is set to logic 1. To write data to the MFRC522 the MSB bit has to be set to logic 0. The bits define the address and the LSB shall be set to logic 0. ...

Page 49

... Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader Transfer Speed Accuracy heximal FAh -0.25% EBh 0.32% DAh -0.25% CBh 0.32% ABh 0.32% 9Ah -0.25% 7Ah -0.25% 74h -0 ...

Page 50

... Table 142: Byte Order to Read Data RX TX Fig 9. Schematic Diagram to Read Data 112132 Product data sheet Length 1 bit 8 bits 1 bit No parity bit is used during transmission. byte 0 adr Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Value 0 Data 1 byte 1 data 0 © NXP B.V. 2007. All rights reserved 109 ...

Page 51

... The MSB of the first byte sets the used mode. To read data from the MFRC522 the MSB is set to logic 1. To write data to the MFRC522 the MSB has to be set to logic 0. The bit 6 is reserved for further use and the bits define the address. ...

Page 52

... Fast mode and High-speed mode. SDA is a bi-directional line, connected to a positive supply voltage via a current-source or a pull-up resistor. Both lines SDA and SCL are set to HIGH level if no data is transmitted. The MFRC522 has a tri-state output stage to perform the wired-AND function. Data on the 2 I C-bus can be transferred at data rates 100 kbit/s in Standard mode 400 kbit/s in the Fast mode ...

Page 53

... Therefore, the S symbol will be used as a generic term to represent both the START and repeated START (Sr) conditions. Fig 13. START and STOP conditions. 112132 Product data sheet 2 C-bus. 2 C-bus, unique START (S) and STOP (P) conditions Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 54

... STOP (P) or repeated START (Sr) condition. Fig 14. Acknowledge on the I 112132 Product data sheet procedure.”. The number bus. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 55

... I according EA pin Pin is set to LOW than for all MFRC522 devices the upper 4 bits of the device bus address are reserved by NXP and set to 0101(bin). The remaining 3 bits (ADR_0, ADR_1, ...

Page 56

... FIFO access. The read/write bit shall be set to logic 0. 112132 Product data sheet Bit 6 Bit 5 Bit 4 Bit specific register of the MFRC522 the Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Bit 2 Bit 1 Bit rules. The © NXP B.V. 2007. All rights reserved. ...

Page 57

... NXP Semiconductors 10.4.8 Register Read Access To read out data from a specific register address of the MFRC522 the host controller shall use the procedure: First a write access to the specific register address has to be performed as indicated in the following frame. The first byte of a frame indicates the device address according to the I second byte indicates the register address ...

Page 58

... Hs-mode transfers, separated by repeated START conditions (Sr). 2 Fig 18 mode protocol switch 112132 Product data sheet 2 C-bus behavior. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC 2 C-bus specification. © NXP B.V. 2007. All rights reserved 109 ...

Page 59

... NXP Semiconductors 2 Fig 19 mode protocol frame 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 60

... NXP Semiconductors 10.4.12 Switching from F mode and Vice Versa After reset and initialization, the MFRC522 is in Fast mode (which is in effect F/S mode as Fast mode is downward compatible to Standard mode). The connected MFRC522 recognizes the “S 00001XXX A” sequence and switches its internal circuitry from the Fast mode setting to the HS mode setting ...

Page 61

... RF_n Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Section 24 “Application information”. The GSPMos GSNMos Remarks x x not specified switched off pMod nMod 100% ASK: TX1 pulled to 0, independent of pCW nCW InvTx1RFOff pMod ...

Page 62

... RF_n RF_n RF_n CWGsP are used for both drivers. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC TX2 GSPMos GSNMos Remarks not specified switched off RF pMod nMod RF pCW nCW pMod nMod pCW nCW ...

Page 63

... MFIN and MFOUT (see MFIN/MFOUT Signal and UARTSel of registers TxSelReg and RxSelReg. This topology supports, that some parts of the analog part of the MFRC522 may be connected to the digital part of another device. The switch MFOutSel in register TxSelReg can be used to measure MIFARE ISO/IEC14443 related signals ...

Page 64

... NXP Semiconductors Remark: The MFRC522 has an extra supply pin (SVDD and PVSS as Ground line) for the M iller C oder Tx Bit Stream TestBus Serial data stream Tx Digital Part M FRC522 Serial data stream anchester R x Bit Stream D ecoder Fig 21. Overview MFIN/MFOUT Signal Routing 11 ...

Page 65

... FIFO Buffer 12.1 Overview An 64 × 8-bit FIFO buffer is implemented in the MFRC522. It buffers the input and output data stream between the host and the internal state machine of the MFRC522. Thus possible to handle data streams with lengths bytes without taking timing constraints into account ...

Page 66

... The bit LoAlert is set to logic 1 if WaterLevel bytes (as set in register WaterLevelReg) or less are actually stored in the FIFO-buffer generated according to the following equation: 112132 Product data sheet ( 64 FIFOLength ) ≤ HiAlert = – ≤ LoAlert = FIFOLength WaterLevel Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC WaterLevel © NXP B.V. 2007. All rights reserved 109 ...

Page 67

... NXP Semiconductors 13. Timer Unit A timer unit is implemented in the MFRC522. The external host may use this timer to manage timing relevant tasks. The timer unit may be used in one of the following configurations: • Time-out counter • Watch-dog counter • Stop watch • Programmable one-shot • ...

Page 68

... NXP Semiconductors 14. Interrupt Request System The MFRC522 indicates certain events by setting bit IRq in the register Status1Reg and additionally, if activated, by pin IRQ. The signal on pin IRQ may be used to interrupt the host using its interrupt handling capabilities. This allows the implementation of efficient host software. ...

Page 69

... NXP Semiconductors 15. Oscillator Circuitry The clock applied to the MFRC522 acts as time basis for the coder and decoder of the synchronous system. Therefore stability of the clock frequency is an important factor for proper performance. To obtain highest performance, clock jitter has small as possible. This is best achieved by using the internal oscillator buffer with the recommended circuitry ...

Page 70

... AVDD and it will take a certain time t can be detected by the internal logic. For the serial UART it is recommended to send the value 55 (hex) to the MFRC522 first. For further access to the registers the oscillator must be stable. Therefore, perform a read accesses to address 0 till the MFRC522 answers to the last read command with the register content of address 0 ...

Page 71

... In order to perform a reset, the signal has to be low for at least 100 ns. 17.2 Oscillator Startup Time Having set the MFRC522 to a Power-down mode or supplying the IC with XVDD the following figure describes the startup timing for the oscillator. The time t startup time is defined by the crystal itself ...

Page 72

... NXP Semiconductors 18. MFRC522 Command Set 18.1 General Description The behavior is determined by a state machine capable to perform a certain set of commands. By writing the according command-code to register CommandReg the command is executed. Arguments and/or data necessary to process a command are exchanged via the FIFO buffer. 18.2 General Behavior • ...

Page 73

... This command has to be terminated by writing any command to register CommandReg e.g. the command Idle. If the SelfTest bits in the register AutoTestReg are set correct, the MFRC522 is in Self Test mode and starting the CalCCRC command performs a digital selftest. The result of the selftest is written to the FIFO. ...

Page 74

... NXP Semiconductors 18.3.1.7 Receive Command The MFRC522activates the receiver path and waits for any data stream to be received. The correct settings have to be chosen before starting this command. This command terminates automatically when the received data stream ends. This is indicated either by the end of frame pattern or by the length byte depending on the selected framing and speed ...

Page 75

... Remark: The SerialSpeedReg register is reset and therefore the serial data rate is set to 112132 Product data sheet 1 and the bit Crypto1On in register Status2Reg is set to 9.6 kbps. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC ® card is authenticated and the 1. logic 0. logic © ...

Page 76

... Test bus The test bus is implemented for production test purposes. The following configuration can be used to improve the design of a system using the MFRC522. The test bus allows to route internal signals to the digital interface. The test bus signals are selected by accessing TestBusSel in register TestSel2Reg. ...

Page 77

... 19.3 Testsignals at pin AUX With the MFRC522, the user may select internal signals to measure them at pin AUX. These measurements can be helpful during the design-in phase to optimise the design or for test purpose. Table 154 setting SelAux1 or SelAux2 in the register AnalogTestReg. ...

Page 78

... NXP Semiconductors Table 154: Testsignals description SelAux 1100 1101 1110 1111 112132 Product data sheet Description for Aux1 / Aux2 TxActive RxActive Subcarrier detected TstBusBit Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 79

... AUX2 to the MinLevel. 112132 Product data sheet shows TestDAC1Reg programmed with a slope from 00h to 3Fh. TestDAC2Reg Figure 25 shows the test signal Corr 1 and the test signal MinLevel. The Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 80

... Fig 26. Output ADC channel I on AUX 1 and ADC channel Q on AUX 2. 112132 Product data sheet shows the ADC_I and ADC_Q channel behaviour. The AnalogTestReg is set to Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 81

... At 212, 424 and 848 kbit/s, RxActive is HIGH during datbits and CRC reseption. Startbits are not included. At 212, 424 and 848 kbit/s, TxActive is HIGH during databits and CRC transmission. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 82

... Remark: All relevant register to transmit data have to be configured before entering 112132 Product data sheet Figure 28 shows the actual received data stream. TestSel2Reg is set to 07h PRBS mode according ITU-TO150. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Section 19.2 “Test bus”). The register © NXP B.V. 2007. All rights reserved 109 ...

Page 83

... DD DD and TV shall always be on the same voltage level Parameter Conditions Thermal resistance from In still air with exposed junction to ambient pad soldered layer Jedec PCB Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Max -0.5 +4.0 PV -0 -0.5 SV +0.5 SS ...

Page 84

... Parameter Conditions Input Leakage current Input voltage High Input voltage Low Conditions = Conditions Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max - 0 0.3 PV Min Typ Max - 0 ...

Page 85

... DD Receiver active 1.5 V offset Receiver active 1.5 V offset DC Parameter Conditions Input Leakage current Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max SV -400 +400 Min Typ Max PV -400 mV - ...

Page 86

... mA, TX CWGsP = 0Fh and mA, TX CWGsP = 0Fh TV = 2.5 V and mA, TX CWGsP = 0Fh TV = 2.5 V and mA, TX CWGsP = 0Fh Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max 0 0 Min Typ Max DV -400 ...

Page 87

... Pad Supply Current Transmitter Supply Continuous Wave Current MFIN/MFOUT Pad Supply Current and the external circuitry connected to Tx1 and Tx2 DD are the total currents over all supplies. HPD Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max Unit μA [ μA ...

Page 88

... Parameter Conditions Minimum RxGain = 7 DD modulation voltage outlines the voltage definitions. Parameter Conditions Clock Frequency Duty Cycle of Clock Frequency Jitter of Clock Edges Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max - 100 - - RXMod,man Min Typ Max - 5 ...

Page 89

... Parameter Conditions Output Voltage High XTAL2 Output Voltage Low XTAL2 Input capacitance OSCOUT Input capacitance OSCIN Parameter XTAL Frequency Range XTAL Equivalent Series resistance XTAL Load capacitance XTAL Drive Level Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ - 1 Conditions ...

Page 90

... SCK high pulse width SCK high to data changes data changes to SCK high SCK low to data changes SCK low to NSS high t t SCKL SCKH t SLDX t t DXSH SHDX MSB MSB Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Min Typ Max ...

Page 91

... Fig 31. Timing for F/S mode devices on the I 112132 Product data sheet 2 C Timing in Fast mode Fast mode Min 0 600 600 600 1300 600 0 100 1.3 2 C-bus. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC High speed mode Unit Max Min Max 400 0 3400 kHz - 160 - ns - 160 - ns - 160 - ns ...

Page 92

... NXP Semiconductors 24. Application information The figure below shows a typical circuit diagram, using a complementary antenna connection to the MFRC522. The antenna tuning and RF part matching is described in the application note Ref. 2. µ- Host Interface Processor IR Q IRQ Fig 32. Typical Application Circuit Diagram 112132 Product data sheet ...

Page 93

... NXP Semiconductors 25. Package outline Fig 33. Package outline package version (HVQFN32) Detailed package information can be found on NXP Internet http://www.nxp.com/package/SOT617-1.html 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 94

... SNW-FQ-225B rev.04/07/07 (JEDEC J-STD-020C). MSL for this package is level 1 which means 260 °C convection reflow temperature. Dry pack is not required. Unlimited out of pack Floor Life at maximum ambient 30 °C/85%RH. 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 95

... NXP Semiconductors 27. Packing information Fig 34. Packing Information 1 Tray 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 96

... NXP Semiconductors Fig 35. Packing Information 5Tray 112132 Product data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 97

... Communication flow between a PICC and a PCD according to the ® ISO/IEC 14443A/MIFARE . (Vmax + Vmin). The load modulation index is defined as the card’s voltage ratio (Vmax - Vmin)/ (Vmax + Vmin) measured at the card’s coil. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved 109 ...

Page 98

... Table 135 “Connection Scheme for detecting the different Interface Product data sheet 19.3 Preliminary data sheet Objective data sheet Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Doc. number Supersedes Revision 3.1 Table 153 (see CPCN 200705005F) Revision 3.0 Section 20 “Limiting values” and delete “V and I “ ...

Page 99

... October 2004 • changes in register description 112132 Product data sheet Data sheet status Change notice Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC Doc. number Supersedes © NXP B.V. 2007. All rights reserved 109 ...

Page 100

... Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC © NXP B.V. 2007. All rights reserved. 100 of 109 ...

Page 101

... NXP Semiconductors 32. Contact information For additional information, please visit: For sales office addresses, send an email to: 112132 Product data sheet http://www.nxp.com sales.addresses@www.nxp.com Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC continued >> © NXP B.V. 2007. All rights reserved. 101 of 109 ...

Page 102

... NXP Semiconductors 112132 Product data sheet Notes Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC continued >> © NXP B.V. 2007. All rights reserved. 102 of 109 ...

Page 103

... Table 1. Quick reference data . . . . . . . . . . . . . . . . . 3 Table 2: Ordering information . . . . . . . . . . . . . . . . . 4 Table 3: Pin description . . . . . . . . . . . . . . . . . . . . . . 7 Table 4: Communication overview for ISO/IEC 14443A/MIFARE® reader/writer . . . . . . . . 9 Table 5: MFRC522 Registers Overview . . . . . . . . 11 Table 6: Behavior of Register Bits and its Designation 13 Table 7: Reserved register (address 00h); reset value: 00h Table 8: Description of Reserved register bits . . . . 13 Table 9: CommandReg register (address 01h) ...

Page 104

... Table 127: Reserved register (address 3Ch); reset value: FFh . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 128:Description of Reserved register bits . . . 45 Table 129:Reserved register (address 3Dh); reset value: 00h . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 130:Description of Reserved register bits . . . 45 Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC continued >> © NXP B.V. 2007. All rights reserved. 104 of 109 ...

Page 105

... Table 173: XTAL Oscillator . . . . . . . . . . . . . . . . . . . 89 112132 Product data sheet Table 174: Timing Specification for SPI Table 175.Overview I2C Timing in Fast mode Table 176:Abbreviations . . . . . . . . . . . . . . . . . . . . . 97 Table 177:Revision history . . . . . . . . . . . . . . . . . . . 98 Rev. 3.2 — 22 May 2007 MFRC522 Contactless Reader IC continued >> © NXP B.V. 2007. All rights reserved. 105 of 109 ...

Page 106

... NXP Semiconductors 34. Figures Fig 1. Simplified MFRC522 Block diagram . . . . . . . 5 Fig 2. MFRC522 Block diagram . . . . . . . . . . . . . . . 6 Fig 3. Pinning configuration HVQFN32 (SOT617-1). 7 Fig 4. MFRC522 Reader/Writer mode Fig 5. ISO/IEC 14443A/MIFARE® Reader/Writer mode communication diagram Fig 6. Data Coding and framing according to ISO/IEC 14443A Fig 7. Connection to host with SPI . . . . . . . . . . . . 47 Fig 8 ...

Page 107

... Quick reference data . . . . . . . . . . . . . . . . . . 3 5 Ordering information . . . . . . . . . . . . . . . . . . 4 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . 5 7 Pinning information . . . . . . . . . . . . . . . . . . . 7 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.2 Pin description Functional description . . . . . . . . . . . . . . . . . 9 9 MFRC522 Register SET . . . . . . . . . . . . . . 11 9.1 MFRC522 Registers Overview . . . . . . . . . 11 9.1.1 Register Bit Behavior . . . . . . . . . . . . . . . . 13 9.2 Register Description . . . . . . . . . . . . . . . . . 13 9.2.1 Page 0: Command and Status . . . . . . . . . 13 9.2.1.1 Reserved . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9.2.1.2 CommandReg . . . . . . . . . . . . . . . . . . . . . . 13 9.2.1.3 CommIEnReg . . . . . . . . . . . . . . . . . . . . . . 14 9.2.1.4 DivIEnReg . . . . . . . . . . . . . . . . . . . . . . . . . 16 9.2.1.5 CommIRqReg . . . . . . . . . . . . . . . . . . . . . . 16 9.2.1.6 DivIRqReg . . . . . . . . . . . . . . . . . . . . . . . . . 17 9.2.1.7 ErrorReg . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 ...

Page 108

... Hard Power-down . . . . . . . . . . . . . . . . . . . 70 16.2 Soft Power-down . . . . . . . . . . . . . . . . . . . . 70 16.3 Transmitter Power-down . . . . . . . . . . . . . . 70 17 Reset and Oscillator Startup Time . . . . . . 71 17.1 Reset Timing Requirements . . . . . . . . . . . 71 17.2 Oscillator Startup Time . . . . . . . . . . . . . . . 71 18 MFRC522 Command Set . . . . . . . . . . . . . 72 18.1 General Description . . . . . . . . . . . . . . . . . 72 Contactless Reader IC 18.2 General Behavior . . . . . . . . . . . . . . . . . . . 72 18.3 MFRC522 Commands Overview . . . . . . . 72 18.3.1 MFRC522 Command Description . . . . . . . 73 18.3.1.1Idle Command . . . . . . . . . . . . . . . . . . . . . 73 18.3.1.2Mem Command . . . . . . . . . . . . . . . . . . . . 73 18.3.1.3Generate RandomID Command . . . . . . . 73 18 ...

Page 109

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: sales.addresses@www.nxp.com MFRC522 All rights reserved. Date of release: 22 May 2007 Document identifier: 112132 ...

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