tle8262-2e Infineon Technologies Corporation, tle8262-2e Datasheet

no-image

tle8262-2e

Manufacturer Part Number
tle8262-2e
Description
Universal System Basis Chip Hermes
Manufacturer
Infineon Technologies Corporation
Datasheet
D a t a S h e e t , R e v. 1 . 0 , M ay 2 00 9
T L E 8 2 6 2 - 2 E
U ni v e r s a l S y s t e m B as i s C h i p
H ER M ES
R ev . 1 . 0
A u to m o t i v e P o w e r

Related parts for tle8262-2e

tle8262-2e Summary of contents

Page 1

...

Page 2

... Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 9.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 9.2 Wake-Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 9.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 10 LIN Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 10.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 10.2 LIN Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 10.3 LIN Cell Mode with SBC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 10.4 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 10.5 Failure Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 10.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 11 Supervision Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 11.1 Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Data Sheet 2 TLE8262-2E Table of Contents Rev. 1.0, 2009-05-26 ...

Page 3

... Corrupted data in the SPI data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 15.3 SPI Input Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 15.4 SPI Output Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 15.5 SPI Data Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 15.6 SPI Output Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 15.7 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 16 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 16.1 ZthJA Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 16.2 Hints for SBC Factory Flash Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 16.3 ESD Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 17 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 18 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Data Sheet 3 TLE8262-2E Table of Contents Rev. 1.0, 2009-05-26 ...

Page 4

... TLE8264-2E (3LIN), TLE8263-2E (2LIN Limp Home outputs • TLE8264E (3LIN), TLE8263E (2LIN Limp Home output • TLE8262-2E (1LIN), TLE8261-2E (no LIN Limp Home outputs • TLE8262E (1LIN), TLE8261E (no LIN Limp Home output Basic Features • Very low quiescent current in Stop and Sleep Modes • ...

Page 5

... Open drain Limp Home outputs • Dedicated internal logic supply • Maximum safety architecture for Safety Operation Mode • Configurable Fail-Safe behavior • Dedicated side indicators signal 1.25Hz 50% duty cycle • Dedicated PWM signal 100Hz 20% duty cycle Data Sheet V ccHSCAN 5 TLE8262-2E HERMES Overview Rev. 1.0, 2009-05-26 ...

Page 6

... STATE MACHINE Interrupt Control RESET GENERATOR WAKE REGISTER GND 6 TLE8262-2E Block Diagram V V cc2 cc3 GND Vint. Limp Home V s CAN cell Block diagram_TLE8262-2E.vsd Rev. 1.0, 2009-05-26 LH_PL/ test Limp home LHO_SI RO V CCHSCAN TxD CAN RxD CAN CAN_H SPLIT CAN_L ...

Page 7

... V cc3 12 base GND cc3REF INT cc1 µ cc2 V 18 ccHSCAN Figure 2 Pin Configuration Data Sheet TLE8262-2E Exposed Die Pad 7 TLE8262-2E Pin Configuration LH_PL/Test 36 Limp home LH_SI 33 n.c. 32 GND 31 n.c. 30 n.c. 29 n. RxD LIN TxD 25 LIN RxD 24 ...

Page 8

... Ground 23 TxD CAN Transmit Data Input; integrated pull-up resistor. CAN 24 RxD CAN Receive Data Output CAN 25 TxD LIN Transceiver Data input; according to ISO 9141 and LIN specification 2.1 as LIN well as SAE J2602-2. integrated pull-up resistor. Data Sheet 8 TLE8262-2E Pin Configuration Rev. 1.0, 2009-05-26 ...

Page 9

... The exposed die pad at the bottom of the package allows better dissipation of heat from the SBC via the PCB. The exposed die pad is not connected to any active part of the IC and can be left floating or it can be connected to GND for the best EMC performance. Data Sheet V or leave open for normal operation TLE8262-2E Pin Configuration 1) Rev. 1.0, 2009-05-26 ...

Page 10

... SBC Factory Flash mode Vcc1 Vcc2/3 ext. off L.H. CAN OR inact. off & Undervoltage time CC1 Power mode managment . vsd Rev. 1.0, 2009-05-26 TLE8262-2E State Machine WD WD trig fixed/off LIN wakable/ off WD mode set LIN mode set WD off LIN off ...

Page 11

... Note: In Init Mode it is recommended to send one SPI command that sets the device to Normal Mode, triggers the watchdog the first time and sets the required watchdog settings. Data Sheet V turns OFF, cc1µC V cc1µ the device is completely disabled. For more details on the disable UVOFF 11 TLE8262-2E State Machine Test pin INT Pin bit 0V n.a n Open / ...

Page 12

... SPI Wake register before the next Cyclic Wake-Up comes. Otherwise, the SBC goes to SBC Restart Mode. Data Sheet 13. can be switched on or off. cc2/3 Chapter 11.2.4) 12 TLE8262-2E State Machine V is always “ON” cc1µC cc1µC Rev. 1.0, 2009-05-26 ...

Page 13

... The first SPI output data when going to SBC Normal Mode will always indicate the reason for the SBC Restart event. Data Sheet V after wake cc1µC V after wake or cool down of Vcc1µC. cc1µC 13 TLE8262-2E State Machine Table cc1µC is programmable RDx Rev. 1.0, 2009-05-26 ...

Page 14

... OFF after 1st Reset low from Unchanged outside Reset clamped ON Wake-up event ON undervoltage reset unchanged Reset low from Unchanged outside Reset clamped ON 14 TLE8262-2E State Machine V RO SPI Out Bits cc1µC remains ON LOW LH 0..2 remains ON LOW RM 0..1 remains ON LOW LH 0..2 ramping up LOW RM 0..1 LH 0.. ...

Page 15

... Note: Please respect the absolute maximum ratings when the device is in SBC Factory Flash Mode. Data Sheet V is above S in any configuration. 5.1. The reset can be driven by an external circuit, or pulled high with a pull-up 15 TLE8262-2E State Machine V range. LHUV V overtemperature cc1µ not powered from external ...

Page 16

... I V -0.3 DRI,RD I -500 -55 stg V -6 ESD V -2 ESD V -750 ESD_CDM _C -500 V ESD_CDM 16 TLE8262-2E General Product Characteristics Unit Test Conditions Max – 5 V/µs – 5.5 V – – CANH-CANL<|40 V|; CANH-SPLIT<|40 V| CANL-SPLIT<|40 V|; 5.5 V – – – ...

Page 17

... S UV OFF f – 4 clkSPI f – 1 clkSPI T -40 150 OFF V 4.5 5 5.5 40 S_LH 17 TLE8262-2E General Product Characteristics Unit Test Conditions V After V rising above 400 ms pulse 40 V load dump 2Ω MHz > 5 MHz If > ...

Page 18

... T jPW T 150 – 200 jSDCAN T ∆ – 10 – CAN T 150 – 200 jSDLIN T ∆ – 10 – LIN 18 TLE8262-2E General Product Characteristics Unit Test Conditions K/W 300 mm cooling area 2) 3) K/W 2s2p + 600 mm cooling area 3) K/W 3) ° ° – 3) ° ...

Page 19

... VS_LIN – – 5.0 I – – – 78 100 19 TLE8262-2E General Product Characteristics Unit Test Condition mA SBC Normal Mode 0mA; CC1µC CC2 CAN OFF mode; LIN OFF mode mA CAN Normal Mode; V Recessive state; CC2 connected to V CCHSCAN ...

Page 20

... Max. I – VS_sleep_ SBC 0.5 1 – VS_sleep_ LIN – VS_sleep_ CAN 20 TLE8262-2E General Product Characteristics Unit Test Condition µA SBC Sleep Mode 25° 13 “OFF” CC1µC/2/3 CAN/LIN wake capable 85° µA SBC Sleep Mode; ...

Page 21

... CC1µC_max CC2 V V and can be either ON or OFF by definition, V cc1µC cc2 21 TLE8262-2E Internal Voltage Regulator V CC 1µC V CC2 State Machine INH INTE RNA L RE GULA TOR DIA GRA CC1µC/2_max Figure 4 , the DMOS of the voltage regulator is ...

Page 22

... OFF , and the dependency are set to the default value. See OFF SBC Init Any mode is implemented. Refer to Chapter 13 V cc2 22 TLE8262-2E Internal Voltage Regulator Vcc2 OFF ON OFF OFF unchanged ON OFF ON OFF OFF . At the first ramp up from SBC Init cc1µC Chapter 11 ...

Page 23

... CC2,Li V ∆ – – CC2,Lo PSRR – 200 – cc2 V – – DR_Vcc2 V 4.5 4.65 UV_VCC2 23 TLE8262-2E Internal Voltage Regulator Unit Test Condition Max < <200 mA; CC1µC V 5.5 V < < < < CC1µC ...

Page 24

... External Voltage Regulator and . One transistor is tested cc3shunt cc3ref = 5.0 V with a precision of ± Q,nom is reported in the diagnostic cc3 V V < s VextUV V together . s Vcc 3ref I CC3base + - V REF External voltage diagram .vsd Table 4 OFF OFF OFF Rev. 1.0, 2009-05-26 TLE8262-2E 4%. The output , the external identifies the ...

Page 25

... Hardware Set Up Data Sheet I CC3 R T1 SHUNT Vcc3shunt Vcc3base > I CC3shunt CC3base shunt_threhold State machine 25 External Voltage Regulator t SPI t Undervoltage Managment vcc 3.vsd <200 mA). Other PNP transistors can be used. V CC3 I CC3 C 2 Vcc3ref + V - REF External voltage diagram_appli_note.vsd Rev. 1.0, 2009-05-26 TLE8262- ...

Page 26

... Do not enable the Vcc3 via SPI as this leads to increased current consumption. Data Sheet V function CC3 Reference / Value 10µF/10V GCM31CR71AA106K 220mΩ MJD253 SHUNT V shunt_threshold U shunt_threshold R -------------------------------------- = SHUNT I CC3max 26 TLE8262-2E External Voltage Regulator I I > is set is determined by the shunt CC3 CC3max . Rev. 1.0, 2009-05-26 ...

Page 27

... BE V 4.5 - 5.5 VextUV V - 0.2 - VextUVhy s Figure 8 V 4.8 5 5.2 cc3 V ∆ CC3,Lo ∆ CC3,Li 27 TLE8262-2E External Voltage Regulator Unit Test Condition 28V CC3base V µ cc3ref V V µA = cc3shunt S V – µ 0V; cc3 I = 20mA CC3base,50% Figure µ ...

Page 28

... Timing diagram for regulator reaction time “current increase regulation reaction time” and “current decrease regulation reaction time” V CC3 I CCbase Figure 9 Regulator Reaction Time Data Sheet I CC3base,50 rlinc rldec 28 TLE8262-2E External Voltage Regulator t t Rev. 1.0, 2009-05-26 ...

Page 29

... The CAN transceiver is designed to withstand the severe conditions of automotive applications and to support 12 V applications. Data Sheet Driver Output Stage Temp.- Protection V ccHS CAN Receiver Vs Wake V SPLIT Receiver 29 TLE8262-2E High Speed CAN Transceiver V SPI Mode CC1µC Control R TD TxD + CAN timeout To SPI diagnostic RxD Diag V CC1µC ...

Page 30

... After wake-up the transceiver can be switched Vcc1µC INT Ramping up HIGH 1) ON LOW Ramping HIGH Ramping up HIGH 1) ON LOW automatically transfers the SBC into the SBC WU Figure 30 TLE8262-2E RxD Int. Bit WK CAN LOW 1 LOW 1 LOW 1 LOW 1 LOW 1 11. The microcontroller is Rev. 1.0, 2009-05-26 ...

Page 31

... In SBC Normal Mode wake-up is detected signaled by the “WK CAN” SPI bit and INT output, and RxD remains LOW. Data Sheet CAN Waked t ROx SBC Restart 31 TLE8262-2E High Speed CAN Transceiver Communication starts CAN Normal mode SPI command SBC Normal mode Application with sleep .vsd Rev ...

Page 32

... Data Sheet V , the CAN cell does not have enough supply voltage. In this state, the UV_OFF I CANH,lk Wake capable Wake capable Wake capable Wake capable Figure 11 shows the typical timing. 32 TLE8262-2E High Speed CAN Transceiver I and . CANL,lk Normal Receive only Rev. 1.0, 2009-05-26 ...

Page 33

... TxD time-out function deactivates the transmission of the signal TxD TxD Time -out Interrupt t TxD_TO t t > bus dominant clamping is detected. The CAN BUS_TO 33 TLE8262-2E High Speed CAN Transceiver Figure 12. SPI setting : CAN Normal Mode t t Txd timeout .vsd Rev. 1.0, 2009-05-26 ...

Page 34

... Data Sheet Overtemperature D Recessive V cc1µC Figure 14. The SPLIT termination for the left and right nodes is 34 TLE8262-2E High Speed CAN Transceiver R Dominant ), although there is a message sent on the under voltage CC2 ...

Page 35

... Application example for the SPLIT Pin . Data Sheet 60Ohm CAN split Bus termination 60Ohm 10nF split 1,5 kOhm 1,5 kOhm termination at stub CANH SPLIT CANL TLE 6251 G NERR 35 TLE8262-2E High Speed CAN Transceiver CANH TLE 6251 DS 60Ohm split SPLIT termination 10nF 60Ohm CANL Rev. 1.0, 2009-05-26 ...

Page 36

... diff V – 0.8 1.15 diff, rd_W V 0.4 0.7 – diff, dr_W V – 120 – diff, hys_W 36 TLE8262-2E High Speed CAN Transceiver = -40 °C to +150 °C; all voltages j Unit Test Condition diff CANH CANL CAN Normal Mode diff CANH CANL ...

Page 37

... RxD,L V cc1µC V 0.7 × – – TD,H V cc1µC V 0.3 × – – TD,L V cc1µC 37 TLE8262-2E High Speed CAN Transceiver = -40 °C to +150 °C; all voltages j Unit Test Condition V CAN Normal Mode no load mV CAN Normal Mode TxD cc1µC no load V CAN Normal Mode ...

Page 38

... TxD_TO t 0.3 0.6 1.0 BUS_TO 38 TLE8262-2E High Speed CAN Transceiver = -40 °C to +150 °C; all voltages j Unit Test Condition 1) mV kΩ – µs CAN Wake capable Mode ns CAN Normal Mode pF Ω ccHSCAN ...

Page 39

... DIFF V RxD V cc1µC GND Figure 15 Timing Diagrams for Dynamic Characteristics Data Sheet t t d(L),T V diff, rd_N t d(L),R t d(L),TR 0 cc1µC 39 High Speed CAN Transceiver t d(H),T V diff, dr_N t t d(H),R t d(H),TR 0 cc1µ namic c harac teris tics .v sd Rev. 1.0, 2009-05-26 TLE8262-2E ...

Page 40

... SBC can wake up by changing the wake input voltage. The cc1µC t The wake-up capability can be enabled or disabled via SPI command (SBC OFF Mode) the pin high impedance; a wake event will be 40 TLE8262-2E State machine Wake.vsd t . This is used to avoid a WK, f. ...

Page 41

... Mode, the SBC will wake-up after entering the Sleep Mode. Therefore it always needs to be ensured that the bits are cleared before sending the SBC to Sleep Mode. Data Sheet V WK, WK,f WK,f No Wake Event 41 TLE8262-2E V WK,th Wake Event Wake Pin Diagram .vsd Rev. 1.0, 2009-05-26 WK Pin t ...

Page 42

... Symbol Limit Values Min. Typ. Max WK,th V 0.1 – 0.7 I, hys – – -30 – -3 PU_MON I 3 – 30 PD_MON 42 TLE8262-2E WK Pin Unit Test Condition V – V µs – V µ > µ µ Rev. 1.0, 2009-05-26 ...

Page 43

... Normal Mode after the microcontroller sends an SPI word (see Flash Mode. Data Sheet Driver Temp.- Output Protection Current Stage Limit Receiver Filter Vs Wake Receiver Chapter 43 TLE8262-2E LIN Transceiver SPI Mode Control Vcc1µC TxD Input R TD TxDx Timeout To SPI Diagnostic RxD Diag Vcc1µC RxDx LIN BLOCK.VSD V V < ...

Page 44

... After wake-up the transceiver can be switched Vcc1µC INT Ramping up HIGH 1) ON LOW Ramping HIGH Ramping up HIGH 1) ON LOW automatically transfers the SBC into the SBC WK,bus 44 TLE8262-2E LIN Transceiver RxD Int. Bit WK CAN LOW 1 LOW 1 LOW 1 LOW 1 LOW 1 Figure 19. The Rev. 1.0, 2009-05-26 ...

Page 45

... Normal Mode Sleep Mode Restart Mode Stop Mode Fail-Safe Mode SW flash Mode Data Sheet LIN Mode OFF OFF Wake capable OFF Wake capable OFF Wake capable OFF Wake capable Wake capable Flash 45 TLE8262-2E LIN Transceiver Normal / Low slope Receive Only Rev. 1.0, 2009-05-26 ...

Page 46

... The device fulfills the Physical Layer Specification of LIN 2.1. The device fulfills the Physical Layer Specification SAE J2602-2. Data Sheet SPI command LIN Waked t RDx SBC Restart mode 46 TLE8262-2E LIN Transceiver Communication starts t t LIN Normal mode t SBC Normal mode t LIN WK from sleep to normal .vsd ...

Page 47

... Data Sheet t , the TxD time-out function deactivates the transmission of the TxD_TO TxD Time -out Interrupt t TxD_TO t t > bus dominant clamping is detected. The LIN transceiver LIN_TO 47 TLE8262-2E LIN Transceiver Figure 20. SPI setting : LIN Normal Mode t t LIN Txd timeout .vsd Rev. 1.0, 2009-05-26 ...

Page 48

... If the RxD signal is permanently recessive, the failure is diagnosed and the transmitter is deactivated as long as the error occurs. The transmitter is reactivated only after a SPI command. Data Sheet Overtemperature D Recessive 48 TLE8262-2E LIN Transceiver Dominant although there is a message sent on cc1µC Rev ...

Page 49

... RxD,L V – – TxD,H V 0.12 × – TxD,hys V cc1µC V 0.3 × – TxD,L V cc1µ TLE8262-2E LIN Transceiver Unit Test condition Max. – V LIN Normal Mode I = -1.6 mA; RxD(LIN bus S 0.2 × V LIN Normal Mode I = 1.6 mA; V RxD(LIN) cc1µC ...

Page 50

... Bus 0.07 × 0.1 × Bus,hys 0.40 × 0.5 × Bus, – WK,Bus 50 TLE8262-2E LIN Transceiver Unit Test condition Max. – V LIN Normal Mode 0.42 × V LIN Normal Mode (LIN 2.1 Param. 17 0.58 × V LIN Normal Mode V S – V LIN Normal Mode (LIN 2 ...

Page 51

... I 40 100 Bus,sc I -1000 -450 Bus,lk – – -1 – – – Bus I -60 -30 Bus 51 TLE8262-2E LIN Transceiver Unit Test condition Max. 1.0 V LIN Normal Mode TxD CC1µ LIN Normal Mode TxD CC1µC 1.2 V LIN Normal Mode ...

Page 52

... TxD_TO LIN_TO t – 10 torec 0.396 – tduty1 – – tduty2 52 TLE8262-2E LIN Transceiver Unit Test condition Max µ cc1µ pF; RxD (LIN2.1 Param. 31 µ cc1µ pF; RxD (LIN2.1 Param. 31) 2 µ ...

Page 53

... Typ. t 0.417 – duty3 t – – duty4 nF, 1 kΩ / 6.8 nF, 660 Ω nF, 500 Ω bus bus 53 TLE8262-2E LIN Transceiver Unit Test condition Max. – LIN Low slope Mode; 2) duty cycle 3 (max) = 0.778 × TH Rec V S; (max) =0.616 × TH Dom V ...

Page 54

... Trigger Trigger SBC Normal 54 Supervision Functions has reached the reset threshold undervoltage t RDx t LW SPI Init t RR SBC Restart SBC Normal Rev. 1.0, 2009-05-26 TLE8262- the reset RT1,r t and Res_per_8264.vsd ...

Page 55

... SBC retains the set the mode before entering the Stop Mode SBC does not retain the set-up. SBC does not retain the set-up SBC will start default Watchdog setting (256ms Time-out Watchdog) when entering Normal Mode. 55 TLE8262-2E Supervision Functions the RO RD1 RD2 Rev ...

Page 56

... Restart Mode or to Fail-Safe Mode. A watchdog reset is created by setting the reset output RO low (see Figure 24). In config 1 and config 3 the watchdog starts again in Normal Mode with the default watchdog setting (256ms Time-out Watchdog). The watchdog failure can be read at the bits RM0, RM1, LH0, LH1, LH2 via SPI. Data Sheet 56 TLE8262-2E Supervision Functions Rev. 1.0, 2009-05-26 ...

Page 57

... If the new settings were not valid, the watchdog will continue with the old settings and generate a “Wrong WD Set” interrupt. Data Sheet WD Un- open window certainty safe trigger area 0.45 0. WDR Time-out (too long) 57 TLE8262-2E Supervision Functions t OWmax t OWmin uncertainty 0.9 1.0 Wd1_per .vsd ...

Page 58

... WD conf WD not active SPI cmd = SBC SW Flash mode &,WD OFF SPI cmd = SBC SW Flash mode &,WD OFF & WD Trigger WD OFF 58 TLE8262-2E Supervision Functions SPI cmd WD trig SBC Normal mode WD conf Cyclic WK WD active ON / OFF SPI cmd = SBC Normal mode & WD OFF & ...

Page 59

... RD2 t – 256 – - CLKSBC V and Reset Threshold Voltage for falling Vcc. CC1µC 59 TLE8262-2E Supervision Functions Unit Test Condition V default setting, Vcc falling V default setting, Vcc rising V SPI option;Vcc falling V SPI option; Vcc rising V V SPI option; ≥ Vcc ...

Page 60

... Rising Rising Rising 60 Interrupt Function 1 at the event, and remains latched at least until Chapter 14. R INT INT INTERRUPT BLOCK.VSD SPI bit V OTP CC1µ CC2 OT HSCAN CAN Failure 1..0 CAN Bus LINx Failure 1..0 Rev. 1.0, 2009-05-26 TLE8262-2E State Event / State Event/ State ...

Page 61

... Rising and falling 1) ) Rising and falling Rising 1) ) Rising 1) ) Rising Rising Rising Rising Rising Rising Rising Rising V is shown in CC2 61 TLE8262-2E Interrupt Function SPI bit State UV _VCC2 Event / UV _VCC3 State I I > CC3 CC3MAX UV _VCC2 Event UV _VCC3 SPI Fail Reset Event Wrong WD set ...

Page 62

... Conf. Select 000 Conf. Select 001 Conf. Select 002 INT bit UV_V CC2 Figure 27 Interrupt Vcc2 switch-on. Data Sheet Vcc2 switched on by SPI optional required TLE8262-2E Interrupt Function optional Interrupt_ SwitchOn_ VCC2 .vsd Rev. 1.0, 2009-05-26 ...

Page 63

... Figure 29 Interrupt Vcc2 Over Temperature. Data Sheet required optional required optional TLE8262-2E Interrupt Function V is shown in Figure 28. The interrupt is CC2 required optional Interrupt_UV_VCC2.vsd V is shown in Figure 29. The interrupt is ...

Page 64

... Data Sheet t . Afterwards, the INT pin is released but the INT source is still INTTO t INTTO t INTTO SPI read out t , even if the corresponding interrupt register is read out immediately after INT 64 TLE8262-2E Interrupt Function . If an INTTO t . The INT pulse width INTO INTTO t interupt timing.vsd SPI read out Rev ...

Page 65

... INT V 0.3 x – – CFGLO V cc1µC V – – 0.7 x CFGHI V cc1µC R – 250 – CFG 65 TLE8262-2E Interrupt Function Unit Test Condition − µ INT -20µA INT V kΩ INT V – V – kΩ – ...

Page 66

... Chapter Limp home LIMP HOME.VSD f LHSI Limp home LH_SI LIMP HOME_LHSI.VSD d (20% LOW, 80% high impedance), designed to dim PL Figure 33. The LH_PL function is activated when the Limp Home 66 TLE8262-2E Limp Home 31; therefore necessary V V 13. below , s LHUV d frequency with and designed SI Rev. 1.0, 2009-05-26 ...

Page 67

... It means to leave Software Development Mode, the SBC must go back to SBC S UVOFF OFF mode. Data Sheet T test SBC Init mode R LH_ PL T LH_PL Limp home Figure 3. The Test pin has an integrated pull-up resistor 67 TLE8262-2E Limp Home LH_P L_test. vsd V V > until Init Mode is left). If the S UVON Rev. 1.0, 2009-05-26 V the s ...

Page 68

... was ON until the successful Watchdog setting and deactivation via SPI. ) INITTO undervoltage time-out thermal shutdown RT1 RT2 and SthUV1 SthUV2 SthUV3 V under voltage time-out ( cc1µC 68 TLE8262-2E Table 12 and Table cc1µ RT3 t ). Vcc1UVTO V undervoltage time-out. cc1µC Rev. 1.0, 2009-05-26 Limp Home 13. ...

Page 69

... Vcc1µC V RTx GND RO SBC Sleep SBC Restart t Wake Up RDx Limp home GND V Figure 34 undervoltage time-out timing cc1µC Data Sheet V RTx t Vcc1UVTO SBC Normal SBC Restart TLE8262-2E Limp Home t t SBC Fail safe t t undervoltage time out.vsd Rev. 1.0, 2009-05-26 ...

Page 70

... Test,hys V 1 – – Test, Test f 90 100 110 LH_PL TLE8262-2E Limp Home Unit Test Condition – With SPI set. Default Setting 1mA LH µ 28V default setting RT1 V V SPI option ...

Page 71

... V is high, above the reset threshold V cc1µC Time out R CFG INTERRUPT BLOCK_CONFIG.VSD Chapter 12.5 71 TLE8262-2E Configuration Select Chapter 4.2 switched off and the device cc1µC V OFF (Config 2/4), the cc1µC is not switched off (Config 1/3) the INT R , the pull ...

Page 72

... Mode. In that case, an interrupt is generated (if not inhibited) and the bit SPI Fail is set. Since the SPI data is corrupted, the next SPI output data will remain the former one (the information is then repeated). Data Sheet Actual data Actual status TLE8262-2E Serial Peripheral Interface Figure 36). time time New data 0 1 ...

Page 73

... Res. Res Ti. Window /Time out Watchdog Set to Out / 1 Timing Bit Position Win . Reserved Test 2 Test 1 Test 0 73 TLE8262-2E Serial Peripheral Interface LSB CS2 CS1 CS0 MS2 MS1 MS0 Mode Selection Configuration Select Bits ...

Page 74

... Ti. Window /Time out Watchdog Set to Out / 1 Timing Bit Position Win. RM0 Test 2 Test 1 Test 0 1 indicates a high level TLE8262-2E Serial Peripheral Interface LSB CS2 CS1 CS0 MS2 MS1 MS0 Mode Selection Configuration Select ...

Page 75

... Show the device was in Restart previous SPI data Show the device is SBC Software Flash Mode Show the device is in SBC Normal Mode Show the device was in SBC Sleep Mode Show the device is in SBC Stop Mode Show the device was in SBC Fail-Safe Mode Reserved 75 TLE8262-2E Rev. 1.0, 2009-05-26 ...

Page 76

... Interrupt for HIGH to LOW transition Interrupt for both HIGH to LOW and LOW to HIGH n.a 0 n.a 76 TLE8262-2E Serial Peripheral Interface Data Output Wake on CAN (1) Wake on LINx (1) Wake on WK pin 00 No wake 10 Interrupt for a LOW to HIGH transition Interrupt for HIGH to LOW ...

Page 77

... Interrupt enabled (1) disabled 0 (0) for CAN failure 0 Interrupt enabled (1) disabled (0) for CAN bus failure 0 Interrupt enabled (1) disabled 0 (0) for LIN failure 77 TLE8262-2E Serial Peripheral Interface Data Output V temperature pre warning cc1µC (1) HS CAN temperature shutdown (1) V temperature shutdown (1) cc2 Undervoltage detection on Vcc3 ...

Page 78

... Limp Home output state. Activated (1) when entry condition is met Activation (1) of the cyclic wake 1 1 Watchdog failure to Limp Home active only one Watchdog failure brings to Limp Home activated two consecutive Watchdog failures bring to Limp Home activated. 78 TLE8262-2E Serial Peripheral Interface Table 19 Rev. 1.0, 2009-05-26 ...

Page 79

... Bit is reserved and fix set to “1”. Set SW Watchdog is activated 1 1 Check sum of the bit 13...6 In case the CHK SUM is wrong, the device remains in previous valid state. Reserved for input For output, refer to 79 TLE8262-2E Serial Peripheral Interface ⊕ … ⊕ CHKSUM Bit13 Bit6 = Table 21, Table 22 ...

Page 80

... First Watchdog failure (config 3 and acknowledge of the Cyclic Wake- SPI command in SBC Software Flash Mode or reset low from outside Data Sheet Timer (ms ... 256 (default setting) 304 352 ... 976 1024 V cc1µC 80 TLE8262-2E Serial Peripheral Interface Table 21. The Rev. 1.0, 2009-05-26 ...

Page 81

... OFF in SBC Fail-Safe Mode after one Watchdog failure (config 2) cc1µC remains ON in SBC Restart Mode after two Watchdog failures (config 3) cc1µC is OFF in SBC Fail-Safe Mode after two Watchdog failures (config 4) cc1µC 81 TLE8262-2E Serial Peripheral Interface V remains ON, no cc1µC V remains ON, no cc1µ ...

Page 82

... This does not clear the bits. It will be reset when the microcontroller requests the read out Data Sheet Mode selection bits (MS2...0) Configuration select (CS 2..0) Sleep mode Fail-Safe mode Restart mode Restart mode Init mode 82 TLE8262-2E Serial Peripheral Interface 1) Wake Register interrupt 1) Limp Home register 1) Limp Home register SBC Configuration Register SBC Configuration Register Rev ...

Page 83

... MS1 MS2 CS0 CS1 CS2 Configuration Registers Configuration Select Rev. 1.0, 2009-05-26 TLE8262- refresh state TIME refresh state TIME ...

Page 84

... DISU t 50 – – DIHO 84 TLE8262-2E Serial Peripheral Interface Unit Test Condition V – V – – 0.7 × V kΩ CSN CC1µ 0.2 × V kΩ SDI/CLK CC1µC ...

Page 85

... ENSDO t – – 50 DISSDO t – – 60 VASDO LSB 28 LSB 85 TLE8262-2E Serial Peripheral Interface Unit Test Condition ns – ns – µs – µ 100 100 low impedance ns high impedance 100 ...

Page 86

... LOGIC State Machine TxD CAN RxD CAN INT CC2 CAN cell V CCHSCAN CANH Limp Home SPLIT CANL LH_SI LH_PL/Test DEVICE GROUND GND TLE8262-2E Application Information V DD IC2 GND 12 IC3 GND ...

Page 87

... LIN master termination Wetting current of the switch CAN bus termination CAN bus termination Limit the WK pin current in ISO pulses Insulation of the VDD supply Set config 1/3. If not connected config 2/4 is selected 87 TLE8262-2E Application Information depending on load. for CAN Transceiver CC2 I CC3 Rev. 1.0, 2009-05-26 ...

Page 88

... High active Limp Home High active Limp Home High active Limp Home Reverse polarity protection Requested by LIN norm. Protect the application in reverse polarity. micro-controller high side switches Low speed CAN High speed CAN 88 TLE8262-2E Application Information V CC3 V current CC3, Rev. 1.0, 2009-05-26 ...

Page 89

... Figure 45 Board Set-up Board set-up is done according to Data Sheet 0,01 0,1 1 tim e (s) 300mm² cooling area 100mm² cooling area JESD 51-3, single layer FR4 PCB 70 µm 89 TLE8262-2E Application Information 10 100 1000 10000 Zthja curves.vsd minimum footprint PCB set up.vsd . Rev. 1.0, 2009-05-26 ...

Page 90

... CSN CLK SDO SDI TxD LIN1 RxD LIN1 TxD LIN2 RxD LIN2 TxD LIN3 RxD LIN3 TxD CAN RxD CAN INT RO 90 TLE8262-2E Application Information V must be set below 3 V before applying s Reset 5V signal V CSN DD CLK SDI µC SDO TxD LIN1 ...

Page 91

... Can be driven from external if required Can be driven from external if required Can be driven from external if required Can be driven from external if required Can be driven from external if required Can be driven from external if required Table 27 Unit Remarks kV positive pulse kV negative pulse 91 TLE8262-2E Application Information below. 1) Rev. 1.0, 2009-05-26 ...

Page 92

... Data Sheet C 0.1 C 36x SEATING PLANE 0.17 A-B C 36x Ejector Mark -0.2 4) Leadframe Ex Ey A6901-C001 7 5.1 A6901-C003 7 5.1 A6901-C007 5.2 4.6 A6901-C008 6.0 5.4 92 TLE8262-2E Package Outline 0.35 x 45˚ 1) 7.6 -0.2 0.7 ±0.2 10.3 ±0.3 D Bottom View 19 36 Exposed Diepad Index Marking PG-DSO-36-24, -38, -41, -42, -50-PO V09 Dimensions in mm Rev. 1.0, 2009-05-26 ...

Page 93

... Revision History Version Date Parameter 1.0 2009-05-26 Data Sheet Changes First Rev. of Data Sheet 93 TLE8262-2E Revision History Rev. 1.0, 2009-05-26 ...

Page 94

Edition 2009-05-26 Published by Infineon Technologies AG 81726 Munich, Germany 2009 Infineon Technologies AG © All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With ...

Related keywords