sta014t STMicroelectronics, sta014t Datasheet

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sta014t

Manufacturer Part Number
sta014t
Description
Mpeg 2.5 Layer Iii Audio Decoder With Adpcm And Srs Wowo Postprocessing Capability
Manufacturer
STMicroelectronics
Datasheet
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
(1)
July 2000
in order to enable SRS WOW algorithm a mandatory configuration file is required.
SINGLE CHIP MPEG2 LAYER 3 DECODER
SUPPORTING:
- All features specified for Layer III in ISO/IEC
- All features specified for Layer III in ISO/IEC
- Lower sampling frequencies syntax extension,
DECODES LAYER III STEREO CHANNELS,
DUAL
(MONO)
SUPPORTING ALL THE MPEG 1 & 2 SAM-
PLING FREQUENCIES AND THE EXTEN-
SION TO MPEG 2.5:
48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
ACCEPTS MPEG 2.5 LAYER III ELEMEN-
TARY COMPRESSED BITSTREAM WITH
DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
ADPCM CODEC CAPABILITIES:
- sample frequency from 8 kHz to 32 kHz
- sample size from 8 bits to 32 bits
- encoding algorithm: DVI,
- Tone control and fast-forward capability
SRS WOW
AS POSTPROCESSING. SUPPORT FOR
DIFFERENT SPEAKERS TYPES:
- headphone
- medium
- large
WOW
INDIPENDENTLY ADJUSTED
EASY PROGRAMMABLE GPSO INTERFACE
FOR ENCODED DATA UP TO 5Mbit/s
(TQFP44 & LFBGA 64)
DIGITAL VOLUME
BASS & TREBLE CONTROL
SERIAL BITSTREAM INPUT INTERFACE
EASY PROGRAMMABLE ADC INPUT INTERFACE
ANCILLARY DATA EXTRACTION VIA I2C IN-
TERFACE.
SERIAL PCM OUTPUT INTERFACE (I
AND OTHER FORMATS)
11172-3 (MPEG 1 Audio)
13818-3.2 (MPEG 2 Audio)
(not specified by ISO) called MPEG 2.5
ITU-G726 pack (G723-24, G721,G723-40)
MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND
(1)
®
TRUEBASS AND FOCUS CAN BE
CHANNEL,
(1)
TECHNOLOGY CAN BE USED
The Device incorporates the SRS
WOW
cence from SRS Labs, Inc.
SRS WOW POSTPROCESSING CAPABILITY
SINGLE
Technology
CHANNEL
under
STA014 STA014B STA014T
2
S
li-
APPLICATIONS
DESCRIPTION
The STA014 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of de-
coding Layer III compressed elementary streams,
as specified in MPEG 1 and MPEG 2 ISO stand-
ards. The device decodes also elementary streams
compressed by using low sampling rates, as speci-
fied by MPEG 2.5. STA014 receives the input data
through a Serial Input Interface. The decoded sig-
nal is a stereo, mono, or dual channel digital output
that can be sent directly to a D/A converter, by the
PCM Output Interface. This interface is software
programmable to adapt the STA014 digital output
to the most common DACs architectures used on
the market. The functional STA014 chip partitioning
is described in Fig.1a and Fig.1b.
PUT PCM CLOCK GENERATION
ROR DETECTION WITH SOFTWARE INDI-
CATORS
FREQUENCIES SUPPORTED
PLL FOR INTERNAL CLOCK AND FOR OUT-
CRC CHECK AND SYNCHRONISATION ER-
I
LOW POWER 2.4V CMOS TECHNOLOGY
WIDE RANGE OF EXTERNAL CRYSTALS
PC SOUND CARDS
MULTIMEDIA PLAYERS
VOICE RECORDERS
2
C CONTROL BUS
ORDERING NUMBERS: STA014 (SO28)
STA014T (TQFP44)
STA014B (LFBGA 64)
PRODUCT PREVIEW
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