adt7476a Analog Devices, Inc., adt7476a Datasheet - Page 50

• Manufacturer Part Number: adt7476a
• Description: Dbcool Remote Thermal Controller And Voltage Monitor
• Manufacturer: Analog Devices, Inc.

ADT7476A
How Fan Presence Detect Works
4-wire fans typically have an internal pull up to 4.75 V ±10%,
which typically sources 5 mA. While the detection cycle is on,
an internal current sink is turned on, which sinks current from
the fan’s internal pull-up. By driving some of the current from
the fan’s internal pull-up (~100 μA) the logic buffer switches to
a defined logic state. If this state is high, a fan is present; if the
state is low, no fan is present.
Note: The PWM input voltage should be clamped to 3.3 V. This
ensures the PWM output is not pulled to a voltage higher than
the maximum allowable voltage on that pin (5.5 V).
FAN SYNC
When two ADT7476As are used in a system, it is possible to
synchronize them so that one PWM channel from each device
can be effectively OR’ e d together to create a PWM output that
reflects the maximum speed of the two OR’ e d PWMs. This
OR’ e d PWM can in turn be used to drive a chassis fan. See
the Analog Devices website (www.analog.com) for information
on the Fan SYNC function.
STANDBY MODE
The ADT7476A has been specifically designed to respond to
the STBY supply. In computers that support S3 and S5 states,
the core voltage of the processor is lowered in these states.
When monitoring THERM , the THERM timer should be
disabled during these states.
When the V
following occurs:
1.
2.
3.
Once the core voltage, V
everything is re-enabled and the system resumes normal operation.
Status Bit 1 (V
SMBALERT is generated, if enabled.
THERM monitoring is disabled. The THERM timer
should hold its value prior to the S3 or S5 state.
CCP
voltage drops below the V
CCP
) in Interrupt Status Register 1 is set.
CCP
, goes above the V
CCP
low limit, the
CCP
low limit,
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XNOR TREE TEST MODE
The ADT7476A includes an XNOR tree test mode. This mode
is useful for in-circuit test equipment at board-level testing. By
applying stimulus to the pins included in the XNOR tree, it is
possible to detect opens, or shorts, on the system board.
The XNOR tree test is invoked by setting Bit 0 (XEN) of the
XNOR Tree Test Enable Register (0x6F).
Figure 66 shows the signals that are exercised in the XNOR tree
test mode.
POWER-ON DEFAULT
When the ADT7476A is powered up, monitoring is off by
default and the PWM outputs go to 100%. All necessary
registers then need to be configured via the SMBus for the
appropriate functions to operate.
TACH1
TACH2
TACH3
TACH4
PWM2
PWM3
VID0
VID1
VID2
VID3
VID4
Figure 66. XNOR Tree Test
PWM1/XTO