pi2eqx3202b Pericom Semiconductor Corporation, pi2eqx3202b Datasheet

pi2eqx3202b

Manufacturer Part Number

pi2eqx3202b

Description

4-channel Sata2 I/m Redriver, With Equalization And Oob

Manufacturer

Pericom Semiconductor Corporation

Datasheet

1.PI2EQX3202B.pdf (7 pages)

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Features

• Supports data rates up to 3.2Gbps on each lane

• Optimized for SATA i/m operation

• Adjustable Transmiter De-Emphasis & Amplitude

• Adjustable Receiver Equalization

• Two Spread Spectrum Reference Clock Buffer Outputs

• Optimized for SATA applications

• Input signal level detection & output squelch on all channels

• 100-Ohm Differential CML I/O’s

• Low Power (100mW per Channel)

• Standby Mode – Power Down State

• V

• Packaging (Pb-free & Green): 84-ball LFBGA (NB84)

Block Diagram

xI+

xI-

CML

08-0103

SE L [0:2 ]

Operating Range: 1.5V to 1.8V

EN_x

CKIN-

CKIN+

Signal Detection

Equalizer

-- Repeated 2 times --

Management

Power

Bu f fe r

IREF

Limiting

Amp

SE L [2]_ x SE L [3]_ x

EN_

CLK

LVCMOS

CML

OUT-

OUT+

SD_x

xO+

xO-

3.2Gbps, 4 Differential Channel, Serial Re-Driver

with Equalization, De-emphasis, and Squelch

Description

Pericom Semiconductor’s PI2EQX3202B is a low power, signal

Re-Driver. The device provides programmable equalization,

ampliﬁ cation, and de-emphasis by using 7 select bits, SEL[0:6],

to optimize performance over a variety of physical mediums by

reducing Inter-symbol Interference. PI2EQX3202B supports four

100-Ohm Differential CML data I/O’s between the Protocol ASIC

to a switch fabric, across a backplane, or to extend the signals

across other distant data pathways on the user’s platform.

The integrated equalization circuitry provides ﬂ exibility with

signal integrity of the signal before the Re-Driver. Whereas the

integrated de-emphasis circuitry provides ﬂ exibility with signal

integrity of the signal after the Re-Driver.

A low-level input signal detection and output squelch function

is provided for all four channels. Each channel operates fully

independently. When a channel is enabled (EN_x=1) and

operating, that channels input signal level (on xI+/-) determines

whether the output is enabled. If the input level of the channel

falls below the active threshold level (Vth-) then the outputs are

driven to the common mode voltage.

In addition to providing signal re-conditioning, Pericom’s

PI2EQX3202B also provides power management Stand-by mode

operated by an Enable pin.

Pin Description

DO+

EN_CLK

BO+

GND

SD_C

V DD

BO–

V DD

DO–

SEL0_C

SEL0_D

SEL1_C

SEL1_D

GND

V DD

SD_D

SD_B

SD_A

SEL0_A

SEL3_C

GND

V DD

AI+

CI+

AI–

CI–

SEL2_C

SEL4_C

SEL0_B

SEL1_A

SEL1_B

V DD

SEL2_D

SEL4_A

SEL2_A

SEL2_B

CKIN+

OUT0+

84-Ball LFBGA

SEL3_D

SEL4_B

SEL3_A

SEL3_B

CKIN–

OUT0–

PI2EQX3202B

SEL6_A

SEL5_A

SEL5_B

OUT1+

GND

IREF

PS8885G

SEL6_B

OUT1–

GND

V DD

DI+

BI+

DI–

BI–

SEL6_C

SEL6_D

SEL4_D

SEL5_C

EN_A

EN_C

EN_D

GND

04/30/08

SEL5_D

CO+

EN_B

AO+

GND

V DD

AO–

V DD

CO–

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