MK1574 Integrated Circuit System, MK1574 Datasheet
MK1574
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MK1574 Summary of contents
Page 1
... Description The MK1574- Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to ...
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... Type Input output power supply connection MDS1574-01D Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800 www.icst.com C LOC K Frame Rate Communications PLL Output Clocks Decoding Table MK1574-01 (MHz) Decode Address ICLK FS3 FS3:0 (Hex) pin 1 ...
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... External Components/Crystal Selection The MK1574 requires a minimum number of external components for proper operation network (see Capacitor Selection on following page) should be connected between CAP1 and CAP2 as close to the chip as possible. A high quality ceramic capacitor is recommended. A decoupling capacitor of 0.1µF must be connected between VDD and GND pins (pins 2 and 3, 5 and 7) close to the chip, and 33 terminating resistors can be used on clock outputs with traces longer than 1 inch ...
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... Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800 www.icst.com C LOC K Frame Rate Communications PLL K1 Equation 1 C • K2 Equation 2 C 0.0516 0.0516 = 16.6 nF (16 nF nearest standard value) 400 0.707 • 6.2 = 34.7 k (36 k nearest standard value) 16E-9 4 MK1574 (zeta) is the damping factor ; Revision 011601 ...
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... Clock Multipliers/Accuracies In the table on page 2 are the actual multipliers stored in the MK1574 ROM, which yield the exact values shown for the output clocks. MDS1574-01D Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800 www.icst.com ...
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... Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800 www.icst.com C LOC K Frame Rate Communications PLL 45° c Marking MK1574-01S MK1574-01S MK1574-01SI MK1574-01SI Comments Original Added I grade, revised filter equations, updated address. Added Absolute Jitter value. Added additional capacitor requirements pin SOIC narrow Inches Inches ...