w83628g Winbond Electronics Corp America, w83628g Datasheet
w83628g
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w83628g Summary of contents
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Table of Content- 1. GENERAL DESCRIPTION .............................................................................................................. 3 2. FEATURES...................................................................................................................................... 3 3. PACKAGE........................................................................................................................................ 3 4. BLOCK DIAGRAM OF W83628F .................................................................................................... 4 5. BLOCK DIAGRAM OF W83629D.................................................................................................... 5 6. PIN CONFIGURATION.................................................................................................................... 6 6.1 PIN CONFIGURATION FOR 628F........................................................................................ 6 6.2 PIN CONFIGURATION ...
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WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 3 MASK CONTROL REGISTER....... 19 8.15 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 4 MASK CONTROL REGISTER....... 19 8.16 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 5 MASK CONTROL REGISTER....... 19 8.17 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 6 ...
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GENERAL DESCRIPTION W83628F is a PCI-to-ISA bus conversion IC. W83629D is a condensed centralizer IC for IRQ and DMA control. W83628F and W83629D together form a complete set for the PCI-to-ISA bridge. For the new generation Intel chipset Camino ...
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BLOCK DIAGRAM OF W83628F AD[31:0] C/BE[3:0]# PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL SERR# NOGO PCIRST# PCICLK ISOLATE# 3.3V 5V PCI Interface Interface Signal Isolation Control Power SuppIy Handshaking -4- W83628F & W83629D SA[19:0] SD[15:0] BALE AEN IOCHRDY IOCS16# ...
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BLOCK DIAGRAM OF W83629D PCIRST# PCICLK NOGO HS[2:0] ISAREQ# ISAGNT# SERIRQ 3.3V Power SuppIy 5V W83628F & W83629D PCI Host & Bridge Set Handshaking Logic PCI/PCI Interface Serial to Parallel IRQ Publication Release Date: May 18, 2005 - 5 ...
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PIN CONFIGURATION 6.1 PIN CONFIGURATION FOR 628F ...
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PIN CONFIGURATION FOR 629D NOGO ISAREQ# ISAGNT# PCICLK SERIRQ PCIRST# 3VCC W83628F & W83629D ...
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PIN DESCRIPTION Note: Please refer to Section 13.2 DC CHARACTERISTICS for details. I/O 12t - TTL level bi-directional pin with 12 mA source-sink capability I/O 24t - TTL level bi-directional pin with 24 mA source-sink capability I/O 12tp3 - ...
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PCI Interface, contiuned SYMBOL PIN I/O FRAME# 40 I/O 24tp3 IN t IDSEL 29 STOP# 39 I/O 12tp3 I/O 12tp3 IRDY# 41 I/O 12tp3 TRDY# 42 I/O 12tp3 DEVSEL SERR# 45 PAR 49 I/O 12tp3 IN ...
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ISA Interface Signals SYMBOL PIN I/O OUT 24t SA[19:17] 98-96 94-83 I/O 24t SA[16:0] 81-77 110- 107, 104, 103, I/O 24t SD[15:0] 101, 100, 8-15 OUT 24t AEN 118 I/O 24t IOR# 120 I/O 24t IOW# 121 I/O 24t ...
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ISA Interface Signals, contiuned SYMBOL PIN I/O I/O 24t MEMR# 6 I/O 24t MEMW MASTER# 17 5-2 I/O 24t LA[23:17] 127- 125 I/O 12 ROMCS# 73 I/O 24t REFRESH ZEROWS# 106 OUT 24t ...
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W83629D PIN DESCRIPTION 7.2.1 Control Logic and Handshaking Signals SYMBOL PIN I/O I/O 12 HS[2:0] 17- NOGO PCICLK PCIRST# 47 7.2.2 PC/PCI Interface SYMBOL PIN I/O OUT 24t ISAREQ ...
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IRQ Serializer Interface SYMBOL PIN I/OD 12t SERIRQ 46 2-6 IRQ 8-13 [3:7,9:12,14,15] 7.2.4 Power Signals SYMBOL PIN VCC 7, 14, 25 3VCC 48 GND 1, 18, 29, 43 7.2.5 NC Pins SYMBOL PIN NC 36, 37,38, 39, 45 ...
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PCI CONFIGURATION REGISTERS 8.1 VID-VENDOR IDENTIFICATION REGISTER Address Offset: 00-01h Default Value: 1050h Attribute: Read only This register is read-only and contains Winbond vendor identification number(1050h). 8.2 DID-DEVICE IDENTIFICATION REGISTER Address Offset: 02-03h Default Value: 0628h Attribute: Read only ...
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Bit 3 Parity Error Response(Not supported). Hardwired to zero. Bit 2 Bus Master Enable. Hardwired to one. The ISA bridge Bus Masters are always supported to generate a PCI Bus master cycle. Bit 1 Memory Space Enable. Hardwired to one. ...
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Bit 6 66 MHz/ 33 MHz(Only support 33 MHz). Hardwired to zero. Bit 5 User Defineable Features(Not supported). Hardwired to zero. Bit 4:0 Reserved. Reserved and will returns zero when reading this register. 8.5 REVID-REVISION IDENTIFICATION REGISTER Address Offset: 08h ...
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IO_RCVR-IO RECOVERY REGISTER Address Offset: 40h Default Value: 4Dh Attribute: Read/Write Bit 7 SYSCLK Divider SYSCLK is equal to PCICLK divided SYSCLK is equal to PCICLK divided by 3. Bit 6 8-bit I/O ...
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WISA_STS-ISA BRIDGE ERROR STATUS REGISTER Address Offset: 42h Default Value: 00h Attribute: Read/Write Bit 7:3 Reserved. Bit 2 IOCHK# Pin State. This bit reflects the inverse state of IOCHK# pin on the ISA bus. Bit 1 Reserved. Bit 0 ...
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WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 2 MASK CONTROL REGISTER Address Offset: 5Ah Default Value: 00h Attribute: Read/Write This register is used to mask address bits(A7~A0) for fast address decoder # 2, if the corresponding bit of this register is ...
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WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 7 MASK CONTROL REGISTER Address Offset: 5Fh Default Value: 00h Attribute: Read/Write This register is used to mask address bits(A7~A0) for fast address decoder # 7, if the corresponding bit of this register is ...
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WISA_FADCB5-ISA BRIDGE FAST DECODERS # 5 BASE ADDRESS REGISTER Address Offset: 6A-6Bh Default Value: 0000h Attribute: Read/Write This register contains the base address for fast address decoder # 5. 8.25 WISA_FADCB6-ISA BRIDGE FAST DECODERS # 6 BASE ADDRESS REGISTER ...
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WISA_CTRLREG2-ISA BRIDGE CONTROL REGISTER 2 Address Offset: 71h Default Value: 00h Attribute: Read/Write Bit7 =0 Enable IRQ11. =1 Disable IRQ11. Bit 6 =0 Enable IRQ10. =1 Disable IRQ10. Bit 5 =0 Enable IRQ9. =1 Disable IRQ9. Bit 4 =0 ...
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WISA_CTRLREG4-ISA BRIDGE CONTROL REGISTER 4 Address Offset: 73h Default Value: 00h Attribute: Read/Write Bit7 =0 Enable DRQ 7. =1 Disable DRQ 7. Bit 6 =0 Enable DRQ6. =1 Disable DRQ6. Bit 5 =0 Enable DRQ5. =1 Disable DRQ5. Bit ...
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PACKAGE DIMENSIONS 1 FOR W83628F (128-PIN PQFP 102 103 128 See Detail F y Seating Plane 10. PACKAGE DIMENSIONS 2 FOR W83629D (48-PIN LQFP ...
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REVISION HISTORY VERSION DATE 1998.11.16 1998.11.19 1999.01.17 0.32 1999.04.21 A1 May 18, 2005 Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane ...