eq50f100 National Semiconductor Corporation, eq50f100 Datasheet

eq50f100

Manufacturer Part Number

eq50f100

Description

1gbps - 6.25 Gbps Backplane Equalizer

Manufacturer

National Semiconductor Corporation

Datasheet

1.EQ50F100.pdf (10 pages)

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EQ50F100

1Gbps - 6.25 Gbps Backplane Equalizer

General Description

The EQ50F100 is a equalizer designed to compensate

transmission medium losses and reduce the medium-

induced deterministic jitter. It is optimized for operation from

1Gbps to 6.25Gbps, on printed circuit backplane for up to

30" of FR4 striplines with backplane connectors at both

ends. It is code independent, and functioning equally well for

short run length, balanced codes such as 8b/10b, commonly

used in multiplexed 1.25 Gbps Ethernet Systems.

The equalizer uses differential CML inputs and outputs with

feed-through pin-outs, mounted in a 3 mm x 3 mm 6–pin

leadless LLP package. It is powered from single 1.8V supply

and consumes 85 mW.

Simplified Function Diagram

Note: Information contained in this datasheet is subject to change due to changes in design, specification and/or process, before EQ50F100 is production

released.

DS200968

Features

n Recovers 6.25 Gbps signals after 30" of FR4

n Single 1.8V power supply

n Low power consumption: 85mW

n Equalize up to 20dB loss at 2.5 GHz

n 35 ps residual deterministic jitter at 5 Gbps

n On-chip CML terminations

n Small 3 mm x 3 mm 6–pin leadless LLP package

20096801

www.national.com

April 2005

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