sak-c167cr-16rm ETC-unknow, sak-c167cr-16rm Datasheet
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sak-c167cr-16rm Summary of contents
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Microcomputer Components 16-Bit CMOS Single-Chip Microcontrollers C167CR-16RM Data Sheet 12.96 (Advance Information) ...
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C167CR-16RM Revision History: Previous Releases: Page Subjects (compared to Data Sheet C167CR, 06.95) 21 Incremental Interface Mode added capture trigger for CAPREL added. Controller Area Network (CAN): License of Robert Bosch GmbH Edition 12.96 Published by Siemens AG, ...
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... Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards On-Chip Bootstrap Loader 144-Pin MQFP Package (EIAJ) This document describes the SAB-C167CR-16RM and the SAK-C167CR-16RM. For simplicity all versions are referred to by the term C167CR-16RM throughout this document. 16 bit Division ( bit) 1 C167CR-16RM 12 ...
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... IO-capabilities. It also provides on-chip ROM, on-chip high-speed RAM and clock generation via PLL. Figure 1 Logic Symbol Ordering Information Type Ordering Code SAB-C167CR-16RM Q67121-D... SAF-C167CR-16RM Q67121-D... SAK-C167CR-16RM Q67121-D... Semiconductor Group C167CR- 16RM Package Function P-MQFP-144-1 16-bit microcontroller with KByte RAM Temperature range 0 to +70 °C ...
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Note: The ordering codes (Q67121-D...) for the Mask-ROM versions are defined for each product after verifiction of the respective ROM code. Pin Configuration (top view) Figure 2 20Dec96@09:25h Intermediate Version C167CR-16RM 3 C167CR-16RM A22/CAN_TxD /CAN_RxD Semiconductor Group ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Pin Definitions and Functions Symbol Pin Input (I) Number Output (O) P6.0 – I/O P6 ... ... P8.0 – I/O P8.7 ...
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Pin Definitions and Functions (cont’d) Symbol Pin Input (I) Number Output (O) P5.0 – 27 – P5.15 39 – P2.0 – 47 – 54 ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Pin Definitions and Functions (cont’d) Symbol Pin Input (I) Number Output (O) P3.0 – 65 – 70, I/O P3.13, 73 – 80, I/O P3. ...
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Pin Definitions and Functions (cont’d) Symbol Pin Input (I) Number Output (O) WR WRL READY 97 I ALE PORT0: I/O P0L.0 – 100 – P0L.7, 107 P0H.0 - 108, P0H.7 111-117 20Dec96@09:25h Intermediate ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Pin Definitions and Functions (cont’d) Symbol Pin Input (I) Number Output (O) PORT1: I/O P1L.0 – 118 – P1L.7, 125 P1H.0 - 128 – P1H.7 135 132 I 133 I 134 I 135 I XTAL1 138 ...
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Pin Definitions and Functions (cont’d) Symbol Pin Input (I) Number Output (O) V 17, 46 56, 72, 82, 93, 109, 126, 136, 144 V 18, 45 55, 71, 83, 94, 110, 127, 139, 143 20Dec96@09:25h Intermediate ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Functional Description The architecture of the C167CR-16RM combines advantages of both RISC and CISC processors and of advanced peripheral subsystems in a very well-balanced way. The following block diagram gives an overview of the different on-chip ...
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Memory Organization The memory space of the C167CR-16RM is configured in a Von Neumann architecture which means that code memory, data memory, registers and I/O ports are organized within the same linear address space which includes 16 MBytes. The entire ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version External Bus Controller All of the external memory accesses are performed by a particular on-chip External Bus Controller (EBC). It can be programmed either to Single Chip Mode when no external memory is required ...
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Central Processing Unit (CPU) The main core of the CPU consists of a 4-stage instruction pipeline, a 16-bit arithmetic and logic unit (ALU) and dedicated SFRs. Additional hardware has been spent for a separate multiply and divide unit, a bit-mask ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version The CPU disposes of an actual register context consisting wordwide GPRs which are physically allocated within the on-chip RAM area. A Context Pointer (CP) register determines the base address of the active ...
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Interrupt System With an interrupt response time within a range from just 250 ns to 600 ns (in case of internal program execution), the C167CR-16RM is capable of reacting very fast to the occurence of non- deterministic events. The architecture ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Source of Interrupt or Request PEC Service Request Flag CAPCOM Register 0 CC0IR CAPCOM Register 1 CC1IR CAPCOM Register 2 CC2IR CAPCOM Register 3 CC3IR CAPCOM Register 4 CC4IR CAPCOM Register 5 CC5IR CAPCOM Register 6 ...
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Source of Interrupt or Request PEC Service Request Flag CAPCOM Timer 1 T1IR CAPCOM Timer 7 T7IR CAPCOM Timer 8 T8IR GPT1 Timer 2 T2IR GPT1 Timer 3 T3IR GPT1 Timer 4 T4IR GPT2 Timer 5 T5IR GPT2 Timer 6 ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version The C167CR-16RM also provides an excellent mechanism to identify and to process exceptions or error conditions that arise during run-time, so-called ‘Hardware Traps’. Hardware traps cause immediate non-maskable system reaction which is similar to a standard ...
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Capture/Compare (CAPCOM) Units The CAPCOM units support generation and control of timing sequences channels with a maximum resolution of 400 ns (at 20-MHz system clock). The CAPCOM units are typically used to handle high speed I/O ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version *) *) 12 outputs on CAPCOM2 Figure 5 CAPCOM Unit Block Diagram Semiconductor Group 20 ...
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PWM Module The Pulse Width Modulation Module can generate up to four PWM output signals using edge- aligned or center-aligned PWM. In addition the PWM module can generate PWM burst signals and single shot outputs. The frequency range of the ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version (CAPREL). Both timers can be clocked with an input clock which is derived from the CPU clock via a programmable prescaler or with external signals. The count direction (up/down) for each timer is programmable by software ...
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Figure 7 Block Diagram of GPT2 Watchdog Timer The Watchdog Timer represents one of the fail-safe mechanisms which have been implemented to prevent the controller from malfunctioning for longer periods of time. The Watchdog Timer is always enabled after a ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version A/D Converter For analog signal measurement, a 10-bit A/D converter with 16 multiplexed input channels and a sample and hold circuit has been integrated on-chip. It uses the method of successive approximation. The sample time (for ...
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Serial Channels Serial communication with other microcontrollers, processors, terminals or external peripheral components is provided by two serial interfaces with different functionality, an Asynchronous/ Synchronous Serial Channel (ASC0) and a High-Speed Synchronous Serial Channel (SSC). The ASC0 is upward compatible ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version CAN-Module The integrated CAN-Module handles the completely autonomous transmission and reception of CAN frames in accordance with the CAN specification V2.0 part B (active), ie. the on-chip CAN- Module can receive and transmit standard frames with ...
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Instruction Set Summary The table below lists the instructions of the C167CR-16RM in a condensed way. The various addressing modes that can be used with a specific instruction, the operation of the instructions, parameters for conditional execution of instructions, and ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Instruction Set Summary (cont’d) Mnemonic MOV(B) MOVBS MOVBZ JMPA, JMPI, JMPR JMPS J(N)B JBC JNBS CALLA, CALLI, CALLR CALLS PCALL TRAP PUSH, POP SCXT RET RETS RETP RETI SRST IDLE PWRDN SRVWDT DISWDT EINIT ATOMIC EXTR ...
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Special Function Registers Overview The following table lists all SFRs which are implemented in the C167CR-16RM in alphabetical order. Bit-addressable SFRs are marked with the letter “b” in column “Name”. SFRs within the Extended SFR-Space (ESFRs) are marked with the ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address CC3 FE86 43 H CC3IC b FF7E BF H CC4 FE88 44 H CC4IC b FF80 C0 H CC5 FE8A 45 H CC5IC b FF82 C1 ...
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Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address CC17IC b F162 CC18 FE64 32 H CC18IC b F164 CC19 FE66 33 H CC19IC b F166 CC20 FE68 34 H ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address CCM0 b FF52 A9 H CCM1 b FF54 AA H CCM2 b FF56 AB H CCM3 b FF58 AC H CCM4 b FF22 91 H CCM5 ...
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Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address ODP2 b F1C2 ODP3 b F1C6 ODP6 b F1CE ODP7 b F1D2 ODP8 b F1D6 ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address PP3 F03E PSW b FF10 88 H PT0 F030 PT1 F032 PT2 F034 PT3 ...
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Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address SSCEIC b FF76 BB H SSCRB F0B2 SSCRIC b FF74 BA H SSCTB F0B0 SSCTIC b FF72 B9 H STKOV FE14 0A H STKUN ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Special Function Registers Overview (cont’d) Name Physical 8-Bit Address Address T6IC b FF68 F050 T78CON b FF20 90 H T7IC b F17A T7REL F054 ...
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... Absolute Maximum Ratings Ambient temperature under bias ( SAB-C167CR-16RM ........................................................................................................0 to +70 °C SAF-C167CR-16RM .................................................................................................... –40 to +85 °C SAK-C167CR-16RM .................................................................................................. –40 to +125 °C T Storage temperature ( )......................................................................................... – +150 ° Voltage on pins with respect to ground ( CC Voltage on any pin with respect to ground ( Input current on any pin during overload condition .................................................... –10 to +10 mA Absolute sum of all input currents during overload condition ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A Parameter Input low voltage (TTL) Input low voltage (Special Threshold) Input high voltage, all except RSTIN and XTAL1 (TTL) Input high voltage RSTIN Input high voltage XTAL1 ...
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Parameter 4) Port 6 active current PORT0 configuration current XTAL1 input current 5) Pin capacitance (digital inputs/outputs) Power supply current Idle mode supply current Power-down mode supply current Notes 1) This specification is not valid for outputs which are switched ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version 150 AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM 4 AREF CC Parameter Analog input voltage range Sample time Conversion time Total unadjusted error Internal resistance of reference voltage source ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Notes 1) may exceed AIN AGND AREF cases will be X000 or X3FF During the sample time the input capacitance C internal resistance of the analog source must allow ...
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Testing Waveforms AC inputs during testing are driven at 2.4 V for a logic ‘1’ and 0.45 V for a logic ‘0’. Timing measurements are made at Figure 9 Input Output Waveforms For timing purposes a port pin is no ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version AC Characteristics Definition of Internal Timing The internal operation of the C167CR-16RM is controlled by the internal CPU clock f edges of the CPU clock can trigger internal (eg. pipeline) or external (eg. bus cycles) operations. ...
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Phase Locked Loop When pin P0.15 (P0H.7) is high (‘1’) during reset the on-chip phase locked loop is enabled and provides the CPU clock. The PLL multiplies the input frequency by 4 (ie. f fourth transition of f the PLL ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A Parameter Oscillator period High time Low time Rise time Fall time 1) T For temperatures above A 2) The clock input signal must reach the defined levels ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A C (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 (for Port 6, CS) = 100 ALE cycle time = 6 TCL + 2 A Parameter ALE high time ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version Parameter RD to valid data in (with RW-delay valid data in (no RW-delay) ALE low to valid data in Address to valid data in Data hold after RD rising edge Data float after RD ...
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Parameter RdCS to Valid Data In (no RW delay) RdCS, WrCS Low Time (with RW delay) RdCS, WrCS Low Time (no RW delay) Data valid to WrCS Data hold after RdCS Data float after RdCS Address hold after RdCS, WrCS ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version ALE CSx A23-A16 (A15-A8 BHE ...
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ALE CSx A23-A16 (A15-A8 BHE ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version ALE CSx A23-A16 (A15-A8 BHE ...
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ALE CSx A23-A16 (A15-A8 BHE ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A C (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 (for Port 6, CS) = 100 ALE cycle time = 4 TCL + 2 A Parameter ALE high time ...
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Parameter ALE rising edge after RD, WR Address hold after RD, WR ALE falling edge low to Valid Data In CS hold after RD, WR ALE falling edge to RdCS, WrCS (with RW-delay) ALE falling edge to ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version ALE CSx A23-A16 A15- BHE ...
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ALE CSx A23-A16 A15- BHE ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version ALE CSx A23-A16 A15- BHE ...
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ALE CSx A23-A16 A15- BHE ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A C (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 (for Port 6, CS) = 100 pF L Parameter Symbol t CLKOUT cycle time t CLKOUT high time ...
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Running cycle CLKOUT ...
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... +70 °C for SAB-C167CR-16RM -40 to +85 °C for SAF-C167CR-16RM -40 to +125 °C for SAK-C167CR-16RM A C (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 (for Port 6, CS) = 100 pF L Parameter Symbol t HOLD input setup time to CLKOUT ...
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CLKOUT HOLD ...
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C167CR-16RM 20Dec96@09:25h Intermediate Version CLKOUT HOLD ...
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Package Outline Plastic Package, P-MQFP-144-1 (SMD) (Plastic Metric Quad Flat Package) Figure 19 Sorts of Packing Package outlines for tubes, trays, etc. are contained in our Data Book “Package Information” SMD = Surface Mounted Device 20Dec96@09:25h Intermediate Version 65 C167CR-16RM ...