isd15d00 Winbond Electronics Corp America, isd15d00 Datasheet

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isd15d00

Manufacturer Part Number
isd15d00
Description
Digital Chipcorder With Digital Audio Interface
Manufacturer
Winbond Electronics Corp America
Datasheet

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ISD15D00
ISD15D00
Digital ChipCorder
with
Digital Audio Interface
Publication Release Date: June 16, 2011
- 1 -
Revision 0.64

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isd15d00 Summary of contents

Page 1

... ISD15D00 Digital ChipCorder with Digital Audio Interface - 1 - ISD15D00 Publication Release Date: June 16, 2011 Revision 0.64 ...

Page 2

... ELECTRICAL CHARACTERISTICS ...........................................................................................10 6 PERATING ONDITIONS 6 ................................................................................................................................... 11 ARAMETERS 6 ................................................................................................................................... 12 ARAMETERS 6.3.1 Inputs ............................................................................................................................................. 12 6.3.2 Outputs ........................................................................................................................................... 13 6.3.3 SPI Timing ..................................................................................................................................... 16 2 6.3 Timing ...................................................................................................................................... 17 7 APPLICATION DIAGRAM ..........................................................................................................19 8 PACKAGE SPECIFICATION ......................................................................................................21 8.1 QFN-32 (5X5 MM^ ORDERING INFORMATION ......................................................................................................22 10 REVISION HISTORY ..............................................................................................................23 ........................................................................................................................ 10 0.8MM ,P 0.5 MM) .................................................................. 21 HICKNESS ITCH - 2 - ISD15D00 Publication Release Date: June 16, 2011 Revision 0.64 ...

Page 3

... Manufacturer Winbond Family 25X JEDEC The addressing ability of ISD15D00 128Mbit, which is 64-minute playback time based o on 8kHz/4bit ADPCM. Inbuilt 3V voltage regulator to provide power source to the external flash memory o Fast Digital Programming Programming rate can 1Mbits/second mainly limited by the flash memory write rate. ...

Page 4

... Standby Current: 1uA typical Package: Green QFN-32 o Temperature Options: Industrial: - speaker or buzzer V = 4.5V CCSPK V = 4.5V CCSPK directly drive an 8 speaker or buzzer drive an 8 speaker or buzzer via an external amplifier 2 2 S_SDI, I S_SDO for digital audio data 2 S Publication Release Date: June 16, 2011 - 4 - ISD15D00 Revision 0.64 ...

Page 5

... BLOCK DIAGRAM 3 Figure 3-1 ISD15D00 Block Diagram Publication Release Date: June 16, 2011 - 5 - ISD15D00 Revision 0.64 ...

Page 6

... PINOUT CONFIGURATION 4 4.1 QFN-32 Figure 4-1 ISD15D00 QFN-32 Pin Configuration. ISD15D00 Publication Release Date: June 16, 2011 - 6 - ISD15D00 Revision 0.64 ...

Page 7

... This pin is in tri-state when SSB=1. Can be configured as GPIO1. Serial Clock input to the ISD15D00 from the host. Slave Select input to the ISD15D00 from the host. When SSB is low device is selected and responds to commands on the SPI interface. Master-Out-Slave-In. Serial input to the ISD15D00 from the host. ...

Page 8

... Active low interrupt request pin. This pin is an open-drain output. Can be configured as GPIO3. An output pin to report the status of data transfer on the SPI interface. “High” indicates that ISD15D00 is ready to accept new SPI commands or data. Can be configured as GPIO2. Applying power to this pin will reset the chip. (A high pulse of 50ms or more will reset the chip ...

Page 9

... Middle voltage reference for the swing of analog/digital audio outputs. A 4.7uF capacitor should be connected to this pin for supply decoupling and stability. Auxiliary input with the gain set by SPI command If Aux-in is not used, this pin should be left unconnected. This pin should be left unconnected ISD15D00 Publication Release Date: June 16, 2011 Revision 0.64 ...

Page 10

... V CCFS and V . CCA CCSPK . Otherwise: V ≥ CCA CCSPK CCA CCF vs. V – regulated internally from V CCFS CCF - 10 - ISD15D00 VALUES -40°C to +85° C +2.7V to +5.5V 0V +2.7V to +5.5V 0V +2.7V to +5.5V 0V +2.7V to +5.5V +2.25V to +3.6V +2.4V to +3.0V +2.25V to +3.6V should be tied CCFS [4] CCFS Publication Release Date: June 16, 2011 ...

Page 11

... SSD V 0.7xV IH CCD V V -0.3 OL SSD V 0.7xV OH CCD V OH1 =3V, T CCD CCA CCSPK CCFS - 11 - ISD15D00 MAX UNIT CONDITIONS S 5.5 V 5.5 V 5.5 V 5.5 to regulate V V 3.6 tied to V CCF regulated from 2.7 ~ 3.3V CCFS V regulated from 3.3 ~ 5.5V CCFS 3.6 tied to V CCFS 0.3xV V CCD ...

Page 12

... MCLK = 16.384MHz, T CCSPK Symbol Comments/Conditions Gain = 0dB Guaranteed Monotonic Raux_in Aux direct-to-out path, only Input gain = +9.0dB Input gain = +6.0dB Input gain = +3.0dB Input gain = 0dB A AUX(GA ISD15D00 = +25° C, 1kHz signal A Min Typ Max 1 -0.5dB +0.5dB = +25° C, 1kHz signal ...

Page 13

... L signal A-weighted = 3.3V, MCLK = 16.384MHz, T CCSPK Symbol Comments/Conditions Gain paths all at 0dB gain SNR A-weighted THD full-scale L signal A-weighted - 13 - ISD15D00 = +25° C, 1kHz signal A Min Typ Max / 100pF load V / 3.3 CCA 85 -80 = +25° C, 1kHz signal A Min Typ Max / 100pF load V / 3.3 CCA ...

Page 14

... Pout > 0.2W = 3.3V, MCLK = 16.384MHz, T CCSPK Symbol Comments/Conditions bridge-tied-load) SNR A-weighted + Class D Filter THD A-weighted + Class D Filter E 8 bridge-tied-load PWM Pout > 0. ISD15D00 = +25° C, 1kHz signal A Min Typ Max 65 - +25° C, 1kHz signal A Min Typ Max 65 -40 80 Publication Release Date: June 16, 2011 Revision 0 ...

Page 15

... THD A-weighted E 8 bridge-tied-load AB Pout > 0.7W = 3.3V, MCLK = 16.384MHz, T CCSPK Symbol Comments/Conditions Gain paths all at 0dB gain SNR A-weighted THD A-weighted E 8 bridge-tied-load AB Pout > 0. ISD15D00 = +25° C, 1kHz signal A Min Typ Max bridge-tied-load 3.3 CCA 90 - +25° C, 1kHz signal A Min Typ Max bridge-tied-load 3.3 ...

Page 16

... Delay Time from SSB Falling Edge to MISO Active ZMID T Delay Time from SSB Rising Edge to MISO Tri-state MIZD T SCK SCKH T SCKL T MOS T MOH T CRBD Figure 6-2 SPI Timing st SCLK Falling Edge Setup - 16 - ISD15D00 T SSBHI T SSBH T FALL T MIZD T RBCD MIN TYP MAX UNIT 60 --- --- 25 --- ...

Page 17

... T IS_SCK Low Pulse Width SCKL T Rise Time RISE T Fall Time FALL T SCK T SCKH T SCKL T SDIS T SDIH MSB MSB 2 Figure 6 Timing Publication Release Date: June 16, 2011 - 17 - ISD15D00 MIN TYP MAX UNIT --- --- RISE FALL T WSH T WSS LSB MSB ...

Page 18

... IS_SCK Rising Edge to IS_WS Hold Time WSH T IS_SDI to IS_SCK Rising Edge Setup Time SDIS T IS_SCK Rising Edge to IS_SDI Hold Time SDIH T Delay Time from IS_SCLK Falling Edge to IS_SDO SDOD MIN TYP 20 --- 20 --- 15 --- 15 --- --- --- Publication Release Date: June 16, 2011 - 18 - ISD15D00 MAX UNIT --- ns --- ns --- ns --- Revision 0.64 ...

Page 19

... APPLICATION DIAGRAM 7 Figure 7-1 ISD15D00 Application Diagram – regulated internally from V CCF CCFS Publication Release Date: June 16, 2011 - 19 - Revision 0.64 ISD15D00 ...

Page 20

... Figure 7-2 ISD15D00 Application Diagram – V The above application examples are for references only. It makes no representation or warranty that such applications shall be suitable for the use specified. Each design has to be optimized in its own system for the best performance on voice quality, current consumption, functionalities and etc. ...

Page 21

... PACKAGE SPECIFICATION 8.1 QFN-32 (5X5 MM^2, T HICKNESS 0.8MM ,P 0.5 MM) ITCH Publication Release Date: June 16, 2011 - 21 - ISD15D00 Revision 0.64 ...

Page 22

... ORDERING INFORMATION 9 I15D00 YYI Lead-Free Package Type Y: QFN-32 Y: Green (RoHS Compliant) I: Industrial - Publication Release Date: June 16, 2011 - 22 - ISD15D00 Revision 0.64 ...

Page 23

... Update the list of supported Flash Memory. Update: Block Diagram. Electrical Characteristics. Add QFN-32 Package. Update block diagram. Update crystal configuration. Update PWM spec. Class-AB output delivers 0.7-watt at 4.5V. Update package information. Update description of Rise and Fall time. Publication Release Date: June 16, 2011 - 23 - ISD15D00 Revision 0.64 ...

Page 24

... FAX: 81-45-4781800 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. All rights reserved. ChipCorder CA 95134, U.S. ISD15D00 ® ChipCorder ® ® and ISD are trademarks of Nuvoton Technology (Shanghai) Ltd ...

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