isd15c00 ETC-unknow, isd15c00 Datasheet
isd15c00
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isd15c00 Summary of contents
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... ISD15C00 Multi-Message Record/Playback Devices with Digital Audio Interface Publication Release Date: July 1, 2010 - 1 - ISD15C00 Revision 1.0 ...
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... PERATING ONDITIONS 6 ................................................................................................................................... 11 ARAMETERS 6 ................................................................................................................................... 12 ARAMETERS 6.3.1 Internal Oscillator ......................................................................................................................... 12 6.3.2 Inputs ............................................................................................................................................. 12 6.3.3 Outputs ........................................................................................................................................... 13 6.3.4 SPI Timing ..................................................................................................................................... 14 2 6.3 Timing ...................................................................................................................................... 16 7 APPLICATION DIAGRAM .............................................................................................................. 17 8 PACKAGE SPECIFICATION ......................................................................................................... 18 8 LQFP(7 7 1.4 EAD ORDERING INFORMATION .......................................................................................................... 19 10 REVISION HISTORY.................................................................................................................. 20 ........................................................................................................................ 11 2.0 ) .................................................................................... 18 MM FOOTPRINT ISD15C00 Publication Release Date: July 1, 2010 Revision 1.0 ...
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... BTL (bridge-tied-load differential voltage output. FEATURES 2 External Memory: support winbond 25X/25Q SpiFlash. The addressing ability of ISD15C00 128Mbit, which is 64-minute recording time based o on 8kHz/4bit ADPCM. Fast Digital Programming Programming rate can 1Mbits/second mainly limited by the flash memory write rate. ...
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... VOLC: master volume control for PWM, AUDOUT, AUXOUT and I o Operating Voltage: 2.7-3.6V Standby Current: 1uA typical Package: Green 48L-LQFP Temperature Options: Industrial: - S_SDI, I S_SDO for digital audio data 2 S analog inputs Publication Release Date: July 1, 2010 - 4 - ISD15C00 2 S outputs Revision 1.0 ...
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... BLOCK DIAGRAM 3 Figure 3-1 ISD15C00 Block Diagram, ANAIN Selected Publication Release Date: July 1, 2010 - 5 - ISD15C00 Revision 1.0 ...
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... Figure 3-2 ISD15C00 Block Diagram, MICIN Selected Publication Release Date: July 1, 2010 - 6 - ISD15C00 Revision 1.0 ...
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... NC CSB S_SDI/GPIO7 2 I S_SCK/GPIO6 2 I S_WS/GPIO5 2 I S_SDO/GPIO4 SSD V CCD VREG Figure 4-1 ISD15C00 48-Lead LQFP Pin Configuration ISD15C00 ISD15C00 XTALIN 36 ...
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... This pin is in tri-state when SSB=1. Serial Clock input to the ISD15C00 from the host. Slave Select input to the ISD15C00 from the host. When SSB is low device is selected and responds to commands on the SPI interface. Master-Out-Slave-In. Serial input to the ISD15C00 from the host. ...
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... Active low interrupt request pin. This pin is an open-drain output. An output pin to report the status of data transfer on the SPI interface. “High” indicates that ISD15C00 is ready to accept new SPI commands or data. Applying power to this pin will reset the chip. (A high pulse of 50ms or more will reset the chip ...
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... Or, can be configured as MIC+ which, together with MIC-, provides a microphone differential input. If ANAIN/ANAOUT is not used, this pin should be left unconnected. Auxiliary input with the gain set by SPI command If AUXIN is not used, this pin should be left unconnected. This pin should be left unconnected. Publication Release Date: July 1, 2010 - 10 - ISD15C00 Revision 1.0 ...
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... -0 0.7xV -0 0.7xV OH1 =3V, T =25° C unless otherwise stated ISD15C00 VALUES -40°C to +85°C +2.7V to +3. 3.6V (V –0.3V +0.3V MAX UNITS CONDITIONS 3.6 V 0.3xV 0.3xV 1mA -1mA ...
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... SYMBOL MIN TYP V 1000 AUXIN AUXIN GAIN A -0.5 AUXIN (GA) R 20-40 AUXIN =3V, T =25° C unless otherwise stated ISD15C00 MAX UNITS CONDITIONS +10 MHz Vdd = 3V room temperature +5% MHz With 1% precision resistor, 80k-ohm. Vdd = 3V. At room temperature MAX UNITS CONDITIONS mV Peak-to-Peak ...
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... C unless otherwise stated SYMBOL MIN SINAD AUXIN_AUDOUT SINAD ANAIN_AUDOUT PSRR AUDOUT V BIAS_AUDOUT R 5 L(AUDOUT) C L(AUDOUT AUDOUT =3V, T =25° C unless otherwise stated ISD15C00 [1] MAX UNITS CONDITIONS 80 dB Load Load 5K -40 dB [4] 1 0.1 nF pins. CCA [1] TYP MAX UNITS CONDITIONS ...
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... P VCC=3.0 OUT_SPK THD % R 4 L(SPK) =3V, T =25° C unless otherwise stated SCK T SCKH T SCKL T MOS T MOH T MID T CRBD Figure 6-1 SPI Timing - 14 - ISD15C00 [1] TYP MAX UNITS CONDITIONS 60 dB Load 150 60 dB Load 150 360 mW Load 8 <1% Load SSBHI T SSBH T FALL T MIZD T RBCD ...
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... Delay Time from SCLK Falling Edge to MISO MID T Delay Time from SCLK Rising Edge to RDY/BSYB CRBD Falling Edge T Delay Time from RDY/BSYB Rising Edge to SCLK RBCD Falling Edge st SCLK Falling Edge Setup Publication Release Date: July 1, 2010 - 15 - ISD15C00 MIN TYP MAX UNIT --- --- --- --- ns 30ns ...
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... IS_SCK Rising Edge to IS_SDI Hold Time SDIH T Delay Time from IS_SCLK Falling Edge to IS_SDO SDOD T SCK T SCKH T SCKL T SDIS T SDIH MSB MSB 2 Figure 6 Timing Publication Release Date: July 1, 2010 - 16 - ISD15C00 T T RISE FALL T WSH T WSS LSB MSB LSB MSB MIN TYP MAX UNIT 60 --- --- ns 25 ...
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... The following applications example is for references only. It makes no representation or warranty that such applications shall be suitable for the use specified. Each design has to be optimized in its own system for the best performance on voice quality, current consumption, functionalities and etc. ISD15C00 Figure 7-1 ISD15C00 Application Diagram Publication Release Date: July 1, 2010 - 17 - ISD15C00 Revision 1 ...
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... PACKAGE SPECIFICATION 8 LQFP(7 7 1.4 EAD FOOTPRINT ISD15C00 Publication Release Date: July 1, 2010 Revision 1.0 ...
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... ORDERING INFORMATION 9 I15C00 FYI Lead-Free Package Type F: 48L-LQFP Y: Green (RoHS Compliant) I: Industrial - Publication Release Date: July 1, 2010 - 19 - ISD15C00 Revision 1.0 ...
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... Industrial temp. Update: SPI timing: T maximum 50us. SSBH MICIN input signal: 500mV Revise Block Diagram; add BTL block. Revise Application Diagram. Update: Remove the Preliminary watermark. Output low/high voltage. Update Block Diagram. Update crystal configuration. Publication Release Date: July 1, 2010 - 20 - ISD15C00 Revision 1.0 ...
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... FAX: 81-45-4781800 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. All rights reserved. ChipCorder CA 95134, U.S. ISD15C00 ® ChipCorder ® ® and ISD are trademarks of Nuvoton Technology (Shanghai) Ltd ...