adl5358xcpz-wp Analog Devices, Inc., adl5358xcpz-wp Datasheet

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adl5358xcpz-wp

Manufacturer Part Number
adl5358xcpz-wp
Description
Dual 900mhz Balanced Mixer With High Side Lo Buffer, If Amp, And Rf Balun
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
FEATURES
RF Frequency 700MHz to 1000MHz
IF Frequency 50MHZ to 350MHz
Power Conversion Gain of 8.5dB
SSB Noise Figure of 9.5dB
SSB NF with +10dBm blocker of 16.5dB
Input IP3 of 26dBm
Input P
Typical LO Drive of 0 dBm
Single-ended, 50Ω RF and LO Input Ports
High Isolation SPDT LO Input Switch
Single Supply Operation: 3.3 to 5 V
Exposed Paddle 6 x 6 mm, 36 Lead LFCSP Package
APPLICATIONS
Cellular Base Station Receivers
Main and Diversity Receiver Designs
Radio Link Downconverters
GENERAL DESCRIPTION
The ADL5358 utilizes two highly linear doubly balanced passive
mixer cores along with integrated RF and LO balancing
circuitry to enable single-ended operation. The ADL5358
incorporates two RF baluns allowing for optimal main and
diversity mixer performance over a 700 to 1000 MHz RF input
frequency range using high-side LO injection. The balanced
passive mixer arrangement provides good LO to RF leakage,
typically better than -25dBm, and excellent intermodulation
performance. The balanced mixer cores also provide extremely
high input linearity allowing the device to be used in
demanding cellular applications where in-band blocking signals
may otherwise result in the degradation of dynamic
performance. High linearity IF buffer amps follow the passive
mixer cores, to yield a typical power conversion gain of 8.5dB.
(For a higher IIP3 version of the dual mixer without the IF
amplifiers, please contact the factory).
The ADL5358 provides two switched LO paths that can be
utilized in TDD applications where it is desirable to rapidly
alternate between two local oscillators. LO current can be
externally set using a resistor to minimize DC current
REV. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
1dB
of 10 dBm
commensurate with the desired level of performance. An
additional 3V logic pin is provided to power down (<100uA)
the circuit when desired.
For low voltage applications, the ADL5358 is capable of
operation at voltages down to 3V with substantially reduced DC
current.
The ADL5358 is fabricated using a BiCMOS high performance
IC process. The device is available in a 6mm x 6mm 36-lead
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
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Dual 900MHz Balanced Mixer
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Figure 1. Functional Block Diagram
with High Side LO Buffer,
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© 2009 Analog Devices, Inc. All rights reserved.
IF Amp, and RF Balun
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ADL5358
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www.analog.com
ADL5358
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adl5358xcpz-wp Summary of contents

Page 1

... IC process. The device is available in a 6mm x 6mm 36-lead LFCSP package and operates over a −40°C to +85°C temperature range. An evaluation board is also available. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2009 Analog Devices, Inc. All rights reserved. ADL5358 ...

Page 2

ADL5358 ADL5358—Specifications at V Table 25° 900 MHz Parameter RF INPUT INTERFACE Return Loss Input Impedance RF Frequency Range OUTPUT INTERFACE Output Impedance IF Frequency Range 1 ...

Page 3

Preliminary Technical Data ADL5358—Specifications at VS=3.3V Table 3 25° 1950 MHz Parameter DYNAMIC PERFORMANCE Power Conversion Gain Voltage Conversion Gain SSB Noise Figure Input Third Order Intercept Input ...

Page 4

ADL5358 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, V POS PWDN, LOSW, VGS0, VGS1, VGS2 RF Input Power, DVIN, MNIN Internal Power Dissipation θ (Exposed Paddle Soldered Down) JA θ (At Exposed Paddle) JC Maximum Junction Temperature Operating Temperature ...

Page 5

Preliminary Technical Data PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Function 1 MNIN RF Input for Main Channel. Internally matched to 50Ω. Must be ac-coupled. 2 MNCT Center Tap for Main Channel Input Balun. ...

Page 6

ADL5358 TYPICAL PERFORMANCE CHARACTERISTICS– 25°C, as measured using typical circuit schematic with low-side LO unless otherwise noted Low_Band_Main Low_Band_Div 500 600 ...

Page 7

Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS– 3.3V 25°C, as measured using typical circuit schematic with low-side LO unless otherwise noted Low_Band_Main 2 Low_Band_Div 0 500 600 700 800 900 ...

Page 8

Preliminary Technical Data EVALUATION BOARD SCHEMATIC Figure 15. Evaluation Board Schematic. REV. PrB | Page ADL5358 ...

Page 9

Preliminary Technical Data Table 3. Eval Board Configuration Components Function C1, C4, C5, C8, C10, C12, Power Supply Decoupling. Nominal supply decoupling consists a C13, C15, C18, C21, C22, 0.01 μF capacitor to ground in parallel with 10pF capacitors to ...

Page 10

... OUTLINE DIMENSIONS ORDERING GUIDE Temperature Models Range ADL5358XCPZ-R7 −40°C to +85°C ADL5358XCPZ-WP −40°C to +85°C ADL5358-EVALZ Figure 16. 36-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 6mm × Body, Very Thin Quad (CP-36-1)) Dimensions shown in millimeters Package Description 36-Lead Lead Frame Chip Scale Package ...

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