adl5331 Analog Devices, Inc., adl5331 Datasheet

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adl5331

Manufacturer Part Number
adl5331
Description
1 Mhz To 1.2 Ghz Vga With 30 Db Gain Control Range
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
Voltage-controlled amplifier/attenuator
Operating frequency: 1 MHz to 1.2 GHz
Optimized for controlling output power
High linearity: OIP3 47 dBm @ 100 MHz
Output noise floor: −149 dBm/Hz @ maximum gain
Input impedance: 50 Ω
Output impedance: 20 Ω
Wide gain-control range: 30 dB
Linear-in-dB gain control function: 40 mV/dB
Single-supply voltage: 4.75 V to 5.25 V
APPLICATIONS
Transmit and receive power control at RF and IF
CATV distribution
GENERAL DESCRIPTION
The ADL5331 is a high performance, voltage-controlled
variable gain amplifier/attenuator for use in applications with
frequencies up to 1.2 GHz. The balanced structure of the signal
path maximizes signal swing, eliminates common-mode noise
and minimizes distortion while it also reduces the risk of spu-
rious feed-forward at low gains and high frequencies caused by
parasitic coupling.
The 50 Ω differential input system converts the applied
differential voltage at INHI and INLO to a pair of differential
currents with high linearity and good common-mode rejection.
The signal currents are then applied to a proprietary voltage-
controlled attenuator providing precise definition of the overall
gain under the control of the linear-in-dB interface. The GAIN
pin accepts a voltage from 0 V at a minimum gain to 1.4 V at a
full gain with a 40 mV/dB scaling factor over most of the range.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The output of the high accuracy wideband attenuator is applied
to a differential transimpedance output stage. The output stage
provides a differential output at OPHI and OPLO, which must be
pulled up to the supply with RF chokes or a center-tapped balun.
The ADL5331 consumes 240 mA of current including the out-
put pins and operates off a single supply ranging from 4.75 V
to 5.25 V. A power-down function is provided by applying a
logic low input on the ENBL pin. The current consumption in
power-down mode is 250 μA.
The ADL5331 is fabricated on an Analog Devices, Inc., pro-
prietary high performance, complementary bipolar IC process.
The ADL5331 is available in a 24-lead (4 mm × 4 mm), Pb-free
LFCSP_VQ package and is specified for operation from ambient
temperatures of −40°C to +85°C. An evaluation board is also
available.
RFIN
1 MHz to 1.2 GHz VGA with
30 dB Gain Control Range
GAIN
COM1
INHI
INLO
COM1
VPS1
VPS1
FUNCTIONAL BLOCK DIAGRAM
NC
CONTROL
STAGE
INPUT
VREF
GAIN
ENBL VPS2
BIAS
AND
IPBS
GM
©2009 Analog Devices, Inc. All rights reserved.
OPBS
Figure 1.
COM2
VPS2
COM2
VPS2
OUTPUT
ADL5331
STAGE
(TZ)
COM2
VPS2
ADL5331
COM2
COM2
VPS2
OPLO
VPS2
OPHI
www.analog.com
RFOUT

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adl5331 Summary of contents

Page 1

... The ADL5331 is fabricated on an Analog Devices, Inc., pro- prietary high performance, complementary bipolar IC process. The ADL5331 is available in a 24-lead (4 mm × 4 mm), Pb-free LFCSP_VQ package and is specified for operation from ambient temperatures of −40°C to +85°C. An evaluation board is also available ...

Page 2

... ADL5331 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 5/09—Revision 0: Initial Version Theory of Operation .........................................................................9 Applications Information .............................................................. 10 Basic Connections ...................................................................... 10 Gain Control Input .................................................................... 11 CMTS Transmit Application .................................................... 13 Interfacing Modulator ...

Page 3

... V, input −13 dBm per tone, two tone measurement = 1.4 V GAIN = 1.0 V (differential output) GAIN − intercept) GAIN = 1.4 V, input −13 dBm per tone, two tone measurement = 1.4 V GAIN = 1 within final gain OUT Rev Page ADL5331 Min Typ Max Unit 0.001 1.2 GHz 50 Ω 20 Ω − ...

Page 4

... ADL5331 Parameter Conditions POWER SUPPLIES Pin VPS1, Pin VPS2, Pin COM1, Pin COM2, Pin ENBL Voltage Current, Nominal Active ENBL, Logic 1, Device Enabled ENBL, Logic 0, Device Disabled Current, Disabled ENBL = Logic 0 1 Minimum gain voltage varies with frequency (see Figure 3 , Figure , and ...

Page 5

... V section of this specification is not implied. Exposure to absolute ±200 mV maximum rating conditions for extended periods may affect 5 dBm at 50 Ω device reliability. 5.5 V VPS1 ESD CAUTION VPS1 1.2 W 56.1°C/W 150°C −40°C to +85°C −65°C to +150°C Rev Page ADL5331 ...

Page 6

... ENBL 24 GAIN 25 (EPAD) EP (EPAD) VPS1 VPS2 1 18 PIN 1 COM1 COM2 2 INDICATOR 17 INHI OPHI 3 16 ADL5331 INLO OPLO 15 4 TOP VIEW COM1 COM2 5 14 (Not to Scale) VPS2 VPS1 6 13 NOTES CONNECT. 2. CONNECT THE EXPOSED PAD TO COM1 AND COM2. Figure 2. Pin Configuration Description Positive Supply ...

Page 7

... GAIN –1 20 –2 15 –3 –4 10 1.1 1.3 0.5 GAIN Rev Page ADL5331 1 10 100 FREQUENCY (MHz) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 V (V) GAIN Figure 7. Output IP3 vs 100 MHz GAIN 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 V (V) GAIN Figure 8. Output IP3 vs 400 MHz GAIN ...

Page 8

... ADL5331 0.5 0.6 0.7 0.8 0.9 1.0 V (V) GAIN Figure 9. Output IP3 vs. V GAIN 2 CH2 500mV M 2.0µs 25.0MS/s 40.0ns/pt CH3 200mV Ω A CH1 150mV Figure 10. Step Response of Gain Control Input –5 –10 –15 –20 –25 –30 50 500 FREQUENCY (MHz) Figure 11. Gain vs. Frequency (Differential 50 Ω Output Load) 1 ...

Page 9

... The outputs of the ADL5331 require external dc bias to the positive supply voltage. This bias is typically supplied through external inductors. The outputs are best taken differentially to ...

Page 10

... Figure 16 illustrates differential balance at the input and output using a transformer balun. Input and output baluns are recom- mended for optimal performance. Much of the characterization for the ADL5331 was completed using 1:1 baluns at the input and output for a single-ended 50 Ω match. Operation using M/A-COM ETC1-1-13 transmission line transformer baluns is recommended for a broadband interface ...

Page 11

... A setpoint ETC1-1-13 voltage is applied to the VSET input of the detector while VOUT is connected to the GAIN pin of the ADL5331. Based on the detector’s defined linear-in-dB relationship between VOUT and the RFIN signal, the detector adjusts the voltage on the GAIN pin (the detector’ ...

Page 12

... RFIN SIGNAL DAC 220pF Figure 19. AD8319 Operating in Controller Mode to Provide Automatic Gain Control Functionality in Combination with the ADL5331 Figure 19 shows the basic connections for operating the log detector in an automatic gain control (AGC) loop with the ADL5331. The gain of the ADL5331 is controlled by the output pin of the AD8319 ...

Page 13

... Response from the AD8319 Figure 22 shows the response of the AGC RF output to a pulse on VSET. As VSET decreases from 1 0.4 V, the AGC loop responds with an RF burst. In this configuration, the input signal to the ADL5331 GHz sine wave at a power level of −15 dBm. 16mA AD9789 DAC 16mA Figure 23 ...

Page 14

... RF modulation for communication systems. The output of the ADL5385 is designed to drive 50 Ω loads and easily interfaces with the ADL5331. The input to the ADL5331 can be driven single-ended, as shown in Figure 17. Similar configurations are possible with the ADL537x family of ...

Page 15

... COM1 13 VPS1 VPS2 25 EPAD AGNDA C16A 10nF VS1A VS2A R9A 0Ω Figure 25. ADL5331 Single-Ended Input/Output Evaluation Board Rev Page VPS1A VPS2A GNDA TESTLOOP TESTLOOP TESTLOOP BLUE RED BLACK VPS1A VPS2A AGNDA ENBLA AGNDA VPS1A VPS2A GAINA IPBSA ...

Page 16

... Figure 26. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ × Body, Very Thin Quad (CP-24-2) Dimensions shown in millimeters Package Description 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] ADL5331 Evaluation Board D07593-0-5/09(0) Rev Page 0.60 MAX PIN 1 INDICATOR 1 ...

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