lm613i-mdc National Semiconductor Corporation, lm613i-mdc Datasheet - Page 5

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lm613i-mdc

Manufacturer Part Number
lm613i-mdc
Description
Dual Operational Amplifiers, Dual Comparators, And Adjustable Reference
Manufacturer
National Semiconductor Corporation
Datasheet
Electrical Characteristics
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the
device beyond its rated operating conditions.
Note 2: Input voltage above V
Note 3: More accurately, it is excessive current flow, with resulting excess heating, that limits the voltages on all pins. When any pin is pulled a diode drop below
V
and unpredictable when any parasitic diode or transistor is conducting.
Note 4: Simultaneous short-circuit of multiple comparators while using high supply voltages may force junction temperature above maximum, and thus should not
be continuous.
Note 5: Junction temperature may be calculated using T
soldered to copper-clad board with dissipation from one comparator or reference output transistor, nominal θ
WM package.
Note 6: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 7: Typical values in standard typeface are for T
most likely parametric norm.
Note 8: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold type face).
Note 9: Slew rate is measured with the op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from 5V to 25V, and the output
voltage transition is sampled at 10V and
and 10V.
Note 10: V
Note 11: Average reference drift is calculated from the measurement of the reference voltage at 25˚C and at the temperature extremes. The drift, in ppm/˚C, is
10
is guaranteed by design and sample testing.
Note 12: Hysteresis is the change in V
hysteresis to the typical value, its junction temperature should be cycled in the following pattern, spiraling in toward 25˚C: 25˚C, 85˚C, −40˚C, 70˚C, 0˚C, 25˚C.
Note 13: Low contact resistance is required for accurate measurement.
, a parasitic NPN transistor turns ON. No latch-up will occur as long as the current through that pin remains below the Maximum Rating. Operation is undefined
6
• ∆V
R
/(V
R
R[25˚C]
is the Cathode-to-feedback voltage, nominally 1.244V.
• ∆T
J
), where ∆V
+
is allowed. As long as one input pin voltage remains inside the common-mode range, the comparator will deliver the correct output.
R
is the lowest value subtracted from the highest, V
R
@
caused by a change in T
20V. For falling slew rate, the input voltage is driven from 25V to 5V, and the output voltage transition is sampled at 20V
J
= 25˚C; values in bold face type apply for the full operating temperature range. These values represent the
(Continued)
J
= T
A
+ P
D
J
, after the reference has been “dehysterized”. To dehysterize the reference; that is minimize the
θ
JA
. The given thermal resistance is worst-case for packages in sockets in still air. For packages
5
R[25˚C]
is the value at 25˚C, and ∆T
JA
is 90˚C/W for the N package, and 135˚C/W for the
J
is the temperature range. This parameter
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