SI52142-A01AGM Silicon_Laboratories, SI52142-A01AGM Datasheet

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SI52142-A01AGM

Manufacturer Part Number
SI52142-A01AGM
Description
Specifications: Type: Clock/Frequency Generator, Fanout Buffer (Distribution), Multiplexer ; PLL: Yes with Bypass ; Main Purpose: PCI Express (PCIe) ; Input: Clock, Crystal ; Output: Clock ; Number of Circuits: 1 ; Ratio - Input Output: 1 3 ; Differe
Manufacturer
Silicon_Laboratories
Datasheet

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SI52142-A01AGM
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SI52142-A01AGM
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PCI-E
O
Features
Applications
Description
The Si52142 is a spread-controlled PCIe clock generator that can source
two PCIe clocks and a 25 MHz reference clock. The device has three
hardware output enable control inputs for enabling the respective outputs
on the fly while powered on along with the hardware input for spread
spectrum and frequency control on outputs. In addition to the hardware
control pins, I
optimum clock signal integrity through skew and edge rate control on true,
compliment, or both differential outputs as well as amplitude control.
Functional Block Diagram
Preliminary 0.1 12/11
PCI-Express Gen 1, Gen 2 &
Gen 3 compliant
Low power push-pull type
differential output buffers
Integrated resistors on differential
clocks
Dedicated output enable
hardware pin for each clock
Hardware selectable spread
control
Two PCI-Express clocks
25 MHz reference clock
Network attached storage
Multi-function printer
UTPUT
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
XIN/CLKIN
OE_REF
SS [1:0]
OE [1:0]
SDATA
XOUT
SCLK
XPRESS
2
C programmability is also available to promptly achieve
G
Control & Memory
Control
E N E R A T O R WITH
RAM
G
(SSC)
PLL1
EN
Copyright © 2011 by Silicon Laboratories
1, G
25 MHz crystal input or clock
input
I
capabilities
Triangular spread spectrum
profile for maximum
electromagnetic interference
(EMI) reduction
Industrial temperature
–40 to 85
3.3 V power supply
24-pin QFN package
Wireless access point
Routers
2
Divider
C support with readback
EN
o
C
25 MH
2 & G
DIFF0
DIFF1
REF
EN
Z
R
3 C
EFERENCE
Patents pending
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
OE_DIFF0
VDD_REF
VDD_DIFF
VSS_REF
OE_REF
L O C K
REF
Ordering Information:
1
1
1
2
3
4
5
6
Pin Assignments
S i 5 2 1 4 2
24
7
See page 18
23
8
22
9
GND
T
25
21
10
W O
C
20
11
L O C K
12
19
18
17
16
15
14
13
OE_DIFF1
VDD_DIFF
DIFF1
DIFF1
DIFF0
DIFF0
Si52142
1

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