74abt3284 National Semiconductor Corporation, 74abt3284 Datasheet

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74abt3284

Manufacturer Part Number
74abt3284
Description
18-bit Synchronous Datapath Multiplexer
Manufacturer
National Semiconductor Corporation
Datasheet
C 1995 National Semiconductor Corporation
74ABT3284
18-Bit Synchronous Datapath Multiplexer
General Description
The 74ABT3284 is a synchronous datapath buffer designed
to transmit four 9-bit bytes of data onto one or two 9-bit
bytes in 2 1 or 4 1 multiplexed configurations In addition
the non-inverting transceiver supports bidirectional data
transfer in transparent or registered modes A data byte
from any one of the six ports can be stored during transpar-
ent operation for later recall Data input to any port may also
be read back to itself for byte manipulation or system self-di-
agnostic purposes
The 74ABT3284 is useful for interleaving data in memory
applications or for use in bus-to-bus communications where
variations in data word length or construction are required
Features
Y
Connection Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
Advanced BiCMOS technology provides high speed at
low power consumption
74ABT3284VJG
Commercial
TL F 11582 – 1
Package Number
VJG100A
TL F 11582
Pin Assignment
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin
1
2
3
4
5
6
7
8
9
Mode SO
CP AX
OEC
LDCI
LDCO
SA
SA
X
X
GND
X
X
X
X
X
GND
X
X
OEX
XSEL
XSEL
LDAO
LDAI
OEA
V
100-Lead (14mm x 14mm) Molded Plastic Quad Flatpak JEDEC
0
1
2
3
4
5
6
7
8
CC
2
2
X
X
1
0
0
1
Y
Y
Y
Y
Y
Y
Y
Y
Y
18-bit 2 1 or 9-bit 4 1 multiplexed modes
Registered or transparent datapath operation
Output enables and select lines have the option of be-
ing synchronized for pipelined operation
Independent input output register and control synchro-
nizing clocks insure maximum timing flexibility
Independent control signals insure functional flexibility
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed latchup protection
High impedance glitch free bus loading during entire
power up and power down cycle
Non-destructive hot insertion capability
Pin
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Package Description
V
A
A
A
GND
A
A
A
A
GND
A
A
V
B
B
GND
B
B
B
B
GND
B
B
B
V
CC
CC
CC
8
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
8
Pin
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
CP IN
OEB
LDBI
LDBO
Mode W
YSEL
OEY
Y
Y
GND
Y
Y
Y
Y
Y
GND
Y
Y
LDDO
LDDI
ASEL1
ASEL0
OED
CP XA
Mode SC
8
7
6
5
4
3
2
1
0
RRD-B30M125 Printed in U S A
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin
October 1995
V
D
D
D
GND
D
D
D
D
GND
D
D
V
C
C
GND
C
C
C
C
GND
C
C
C
V
CC
CC
0
1
2
3
4
5
6
7
8
CC
8
7
6
5
4
3
2
1
0

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74abt3284 Summary of contents

Page 1

... Data input to any port may also be read back to itself for byte manipulation or system self-di- agnostic purposes The 74ABT3284 is useful for interleaving data in memory applications or for use in bus-to-bus communications where variations in data word length or construction are required ...

Page 2

... Functional Description The 74ABT3284 is a bi-directional registered data-path rout- ing device which can multiplex de-multiplex four 9-bit ‘‘A- side’’ data ports (Ports onto from one 9-bit ‘‘X- side’’ port (Port X) Alternatively it can be configured for ...

Page 3

Function Tables Inputs MODE (Notes (Note 1) L Note 1 Low to High transitions of MODE SO must be immediately preceeded ...

Page 4

Function Tables (Continued) Inputs Port X Port Y LD MODE ( (H) L (H) H (Note 3) (Note 3) (Notes 2 3) (Notes 2 3) Note 1 Low ...

Page 5

Function Tables (Continued) 1st Level X Side Data Path Select Function Table Inputs SA2X(1) SA2X(0) MODE (Notes 2 3) (Notes (Note 1) ...

Page 6

Logic Diagrams Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays FIGURE 1 18-Bit Synchronous Datapath Multiplexer 11582 – 2 ...

Page 7

Logic Diagrams (Continued) Note Port C configured identical to Port A FIGURE 2 Synchronous Bus Multiplexer Note Port D configured identical to Port B FIGURE 3 Synchronous Bus Multiplexer A-X Datapath B PORT Datapath 11582 – 3 ...

Page 8

Absolute Maximum Ratings Storage Temperature b Ambient Temperature under Bias b Junction Temperature under Bias Ceramic b Plastic b V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note Voltage Applied ...

Page 9

DC Electrical Characteristics Symbol Parameter V Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum High Level Dynamic Output Voltage OHV V Minimum High Level Dynamic Input Voltage IHD V Maximum Low Level Dynamic ...

Page 10

AC Operating Requirements Symbol Parameter t (H) Setup Time High or Low ( Data (Registered Mode) t (H) Hold Time High or Low ...

Page 11

11 ...

Page 12

Physical Dimensions inches (millimeters) 100-Lead Thin Quad Flatpak (TQFP) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION ...

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