dm74als163b Fairchild Semiconductor, dm74als163b Datasheet

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dm74als163b

Manufacturer Part Number
dm74als163b
Description
Dm74als161b, Dm74als162b, Dm74als163b Synchronous Four-bit Counter
Manufacturer
Fairchild Semiconductor
Datasheet

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©1984 Fairchild Semiconductor Corporation
DM74ALS16XB Rev. 1.2
DM74ALS161B, DM74ALS162B, DM74ALS163B
Synchronous Four-Bit Counter
Features
General Description
These synchronous presettable counters feature an
internal carry look ahead for application in high speed
counting designs. The DM74ALS162B is a four-bit
decade
DM74ALS163B are four-bit binary counters. The
DM74ALS161B
DM74ALS162B and DM74ALS163B clear synchro-
nously. The carry output is decoded to prevent spikes
during normal counting mode of operation. Synchronous
operation is provided by having all flip-flops clocked
simultaneously so that outputs change coincident with
each other when so instructed by count enable inputs
and internal gating. This mode of operation eliminates
the output counting spikes which are normally associ-
ated with asynchronous (ripple clock) counters. A
buffered clock input triggers the four flip-flops on the
rising (positive-going) edge of the clock input waveform.
These counters are fully programmable, that is, the out-
puts may be preset to either level. As presetting is syn-
chronous, setting up a low level at the load input
disables the counter and causes the outputs to agree
with set up data after the next clock pulse regardless of
the levels of enable input. LOW-to-HIGH transitions at
the load input are perfectly acceptable regardless of the
logic levels on the clock or enable inputs.
The DM74ALS161B clear function is asynchronous. A
low level at the clear input sets all four of the flip-flop
outputs LOW regardless of the levels of clock, load or
enable inputs. These two counters are provided with a
clear on power-up feature. The DM74ALS162B and
DM74ALS163B clear function is synchronous; and a low
level at the clear input sets all four of the flip-flop outputs
Switching specifications at 50pF
Switching specifications guaranteed over full
temperature and V
Advanced oxide-isolated, ion-implanted Schottky
TTL process
Functionally and pin-for-pin compatible with
Schottky and low power Schottky TTL counterpart
counter,
clears
while
CC
range
asynchronously,
the
DM74ALS161B
while
and
the
LOW after the next clock pulse, regardless of the levels
of enable inputs. This synchronous clear allows the
count length to be modified easily, as decoding the max-
imum count desired can be accomplished with one
external NAND gate. The gate output is connected to the
clear input to synchronously clear the counter to all low
outputs. LOW-to-HIGH transitions at the clear input of
the DM74ALS162B and DM74ALS163B are also permis-
sible regardless of the levels of logic on the clock, enable
or load inputs.
The carry look ahead circuitry provides for cascading
counters for n bit synchronous application without addi-
tional gating. Instrumental in accomplishing this function
are two count enable inputs (P and T) and a ripple carry
output. Both count enable inputs must be HIGH to count.
The T input is fed forward to enable the ripple carry out-
put. The ripple carry output thus enabled will produce a
high level output pulse with a duration approximately
equal to the high level portion of QA output. This high
level overflow ripple carry pulse can be used to enable
successive cascaded stages. HIGH-to-LOW level transi-
tions at the enable P or T inputs of the DM74ALS161B
through DM74ALS163B may occur regardless of the
logic level on the clock.
The DM74ALS161B through DM74ALS163B feature a
fully independent clock circuit. changes made to control
inputs (enable P or T, or load) that will modify the operat-
ing mode will have no effect until clocking occurs. The
function of the counter (whether enabled, disabled, load-
ing or counting) will be dictated solely by the conditions
meeting the stable set-up and hold times.
Improved AC performance over Schottky and low
power Schottky counterparts
Synchronously programmable
Internal look ahead for fast counting
Carry output for n-bit cascading
Synchronous counting
Load control line
ESD inputs
www.fairchildsemi.com
May 2007
tm

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dm74als163b Summary of contents

Page 1

... LOW regardless of the levels of clock, load or enable inputs. These two counters are provided with a clear on power-up feature. The DM74ALS162B and DM74ALS163B clear function is synchronous; and a low level at the clear input sets all four of the flip-flop outputs ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev ...

Page 2

... Ordering Information Order Package Number Number DM74ALS161BM M16A DM74ALS162BM M16A DM74ALS162BN N16E DM74ALS163BM M16A DM74ALS163BN N16E Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Connection Diagram Mode Select Table Clear Load ...

Page 3

... Logic Diagrams ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 DM74ALS161B 3 www.fairchildsemi.com ...

Page 4

... Logic Diagrams (Continued) ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 DM74ALS162B 4 www.fairchildsemi.com ...

Page 5

... Logic Diagrams (Continued) ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 DM74ALS163B 5 www.fairchildsemi.com ...

Page 6

... Timing Diagrams ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 DM74ALS162B 6 www.fairchildsemi.com ...

Page 7

... Timing Diagrams (Continued) ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 DM74ALS161B, DM74ALS163B 7 www.fairchildsemi.com ...

Page 8

... The symbol ( ) indicates that the rising edge of the clock is used as a reference. ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 Parameter Parameter Data Load Clear (Only for DM74ALS162B LOW and DM74ALS163B) HIGH Clear Inactive Data Load Clear (Only for DM74ALS162B and DM74ALS163B Clear CLK HIGH or LOW ...

Page 9

... LOW-to-HIGH Level Output t Propagation Delay Time, PHL HIGH-to-LOW Level Output t Propagation Delay Time, PHL HIGH-to-LOW Level Output Switching Characteristics DM74ALS162B, DM74ALS163B Over recommended operating free air temperature range. Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay Time, PLH ...

Page 10

... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 Package Number M16A 10 www.fairchildsemi.com ...

Page 11

... Physical Dimensions (Continued) Dimensions are in inches (millimeters) unless otherwise noted. Figure 2. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide ©1984 Fairchild Semiconductor Corporation DM74ALS16XB Rev. 1.2 Package Number N16E 11 www.fairchildsemi.com ...

Page 12

... TRADEMARKS The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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