dm74als244a Fairchild Semiconductor, dm74als244a Datasheet

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dm74als244a

Manufacturer Part Number
dm74als244a
Description
Dm74als244a Octal 3-state Bus Driver
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2000 Fairchild Semiconductor Corporation
DM74ALS244AWM
DM74ALS244ASJ
DM74ALS244AMSA
DM74ALS244AN
DM74ALS244A
Octal 3-STATE Bus Driver
General Description
This octal 3-STATE bus driver is designed to provide the
designer with flexibility in implementing a bus interface with
memory, microprocessor, or communication systems. This
device offers 64-extended temperature Grade product
guaranteeing performance from 40 C to 85 C. The out-
put 3-STATE gating control is organized into two separate
groups of four buffers, and both control inputs enable the
respective outputs when set logic LOW. The 3-STATE cir-
cuitry contains a feature that maintains the buffer outputs in
3-STATE (high impedance state) during power supply
ramp-up or ramp-down. This eliminates bus glitching prob-
lems that arise during power-up and power-down.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
H
L
X
Z
Order Number
LOW Level Logic State
High Impedance (OFF) State
HIGH Level Logic State
Don't Care (Either LOW or HIGH Level Logic State)
G
H
L
L
Input
Package Number
A
L
H
X
MSA20
M20D
M20B
N20A
Output
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Y
H
L
Z
DS006212
Features
Logic Diagram
Advanced low power oxide-isolated ion-implanted
Schottky TTL process
Functional and pin compatible with the 74LS counterpart
Improved switching performance with less power dissi-
pation compared with the 74LS counterpart
Switching response specified into 500 and 50 pF load
Switching response specifications guaranteed over full
temperature and V
PNP input design reduces input loading
Package Description
CC
supply range
September 1986
Revised February 2000
www.fairchildsemi.com

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dm74als244a Summary of contents

Page 1

... Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS244AMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide DM74ALS244AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level ...

Page 3

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 3 www.fairchildsemi.com ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide www.fairchildsemi.com Package Number M20D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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