dm74ls164 National Semiconductor Corporation, dm74ls164 Datasheet

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dm74ls164

Manufacturer Part Number
dm74ls164
Description
8-bit Serial In/parallel Out Shift Registers
Manufacturer
National Semiconductor Corporation
Datasheet

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C 1995 National Semiconductor Corporation
54LS164 DM54LS164 DM74LS164
8-Bit Serial In Parallel Out Shift Registers
General Description
These 8-bit shift registers feature gated serial inputs and an
asynchronous clear A low logic level at either input inhibits
entry of the new data and resets the first flip-flop to the low
level at the next clock pulse thus providing complete con-
trol over incoming data A high logic level on either input
enables the other input which will then determine the state
of the first flip-flop Data at the serial inputs may be changed
while the clock is high or low but only information meeting
the setup and hold time requirements will be entered Clock-
ing occurs on the low-to-high level transition of the clock
input All inputs are diode-clamped to minimize transmis-
sion-line effects
Connection Diagram
Logic Diagram
Order Number 54LS164DMQB 54LS164FMQB
54LS164LMQB DM54LS164J DM54LS164W
See NS Package Number E20A
DM74LS164M or DM74LS164N
J14A M14A N14A or W14B
Dual-In-Line Package
TL F 6398
TL F 6398 – 1
Features
Y
Y
Y
Y
Y
Y
Function Table
H
X
u
Q
indicated steady-state input conditions were established
Q
the clock indicates a one-bit shift
A0
An
Clear
e
e
Gated (enable disable) serial inputs
Fully buffered clock and serial inputs
Asynchronous clear
Typical clock frequency 36 MHz
Typical power dissipation 80 mW
Alternate Military Aerospace device (54LS164) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
e
H
H
H
H
L
Don’t Care (any input including transitions)
High Level (steady state) L
Q
Q
Transition from low to high level
Gn
B0
e
Q
H0
The level of Q
Clock
Inputs
u
u
u
e
X
L
The level of Q
A
H
X
X
L
X
A
or Q
H
B
X
X
X
L
e
G
A
before the most recent
Low Level (steady state)
Q
B
Q
Q
H
L
L
L
A0
A
or Q
H
RRD-B30M105 Printed in U S A
Q
Q
Q
Q
respectively before the
Q
Outputs
L
B0
An
An
An
B
u
June 1989
TL F 6398 – 2
transition of
Q
Q
Q
Q
Q
L
H0
Gn
Gn
Gn
H

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dm74ls164 Summary of contents

Page 1

... All inputs are diode-clamped to minimize transmis- sion-line effects Connection Diagram Dual-In-Line Package Order Number 54LS164DMQB 54LS164FMQB 54LS164LMQB DM54LS164J DM54LS164W DM74LS164M or DM74LS164N See NS Package Number E20A J14A M14A N14A or W14B Logic Diagram C 1995 National Semiconductor Corporation TL F 6398 Features ...

Page 2

... Max Max Max DM54 (Note 2) DM74 b V Max (Note DM74LS164 Units Min Nom Max MHz ...

Page 3

Switching Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay Time PLH Low to High Level Output t Propagation Delay Time PHL High to Low Level Output t Propagation Delay Time PHL High to Low Level Output Timing ...

Page 4

Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) 14-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS164DMQB or DM54LS164J Order Number 54LS164LMQB NS Package Number E20A NS Package Number J14A 4 ...

Page 5

... Physical Dimensions inches (millimeters) (Continued) 14-Lead Small Outline Molded Package (M) 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS164M NS Package Number M14A Order Number DM74LS164N NS Package Number N14A 5 ...

Page 6

Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 54LS164FMQB or DM54LS164W LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF ...

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