dm74ls166 Fairchild Semiconductor, dm74ls166 Datasheet

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dm74ls166

Manufacturer Part Number
dm74ls166
Description
8-bit Parallel-in/serial-out Shift Register
Manufacturer
Fairchild Semiconductor
Datasheet

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dm74ls166M
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© 2000 Fairchild Semiconductor Corporation
DM74LS166M
DM74LS166WM
DM74LS166N
DM74LS166
8-Bit Parallel-In/Serial-Out Shift Register
General Description
These parallel-in or serial-in, serial-out shift registers fea-
ture gated clock inputs and an overriding clear input. All
inputs are buffered to lower the drive requirements to one
normalized load, and input clamping diodes minimize
switching transients to simplify system design. The load
mode is established by the shift/load input. When HIGH,
this input enables the serial data input and couples the
eight flip-flops for serial shifting with each clock pulse.
When LOW, the parallel (broadside) data inputs are
enabled and synchronous loading occurs on the next clock
pulse. During parallel loading, serial data flow is inhibited.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
M16A
M16B
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS006400
Clocking is accomplished on the LOW-to-HIGH level edge
of the clock pulse through a two-input NOR gate, permitting
one input to be used as a clock-enable or clock-inhibit func-
tion. Holding either of the clock inputs HIGH inhibits clock-
ing; holding either LOW enables the other clock input. This
allows the system clock to be free running, and the register
can be stopped on command with the other clock input.
The clock-inhibit input should be changed to the high level
only while the clock input is HIGH. A buffered, direct clear
input overrides all other inputs, including the clock, and
sets all flip-flops to zero.
Package Description
August 1986
Revised March 2000
www.fairchildsemi.com

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