dm74ls194a Fairchild Semiconductor, dm74ls194a Datasheet

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dm74ls194a

Manufacturer Part Number
dm74ls194a
Description
4-bit Bidirectional Universal Shift Register
Manufacturer
Fairchild Semiconductor
Datasheet
© 2000 Fairchild Semiconductor Corporation
DM74LS194AM
DM74LS194AN
DM74LS194A
4-Bit Bidirectional Universal Shift Register
General Description
This bidirectional shift register is designed to incorporate
virtually all of the features a system designer may want in a
shift register; they feature parallel inputs, parallel outputs,
right-shift and left-shift serial inputs, operating-mode-con-
trol inputs, and a direct overriding clear line. The register
has four distinct modes of operation, namely:
Synchronous parallel loading is accomplished by applying
the four bits of data and taking both mode control inputs,
S0 and S1, HIGH. The data is loaded into the associated
flip-flops and appear at the outputs after the positive transi-
tion of the clock input. During loading, serial data flow is
inhibited.
Shift right is accomplished synchronously with the rising
edge of the clock pulse when S0 is HIGH and S1 is LOW.
Serial data for this mode is entered at the shift-right data
input. When S0 is LOW and S1 is HIGH, data shifts left
synchronously and new data is entered at the shift-left
serial input.
Clocking of the flip-flop is inhibited when both mode control
inputs are LOW.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Parallel (broadside) load
Shift right (in the direction Q
Shift left (in the direction Q
Inhibit clock (do nothing)
Package Number
M16A
N16E
D
A
toward Q
toward Q
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
A
)
D
)
DS006407
Features
Parallel inputs and outputs
Four operating modes:
Positive edge-triggered clocking
Direct overriding clear
Synchronous parallel load
Right shift
Left shift
Do nothing
Package Description
August 1986
Revised March 2000
www.fairchildsemi.com

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dm74ls194a Summary of contents

Page 1

... Package Number DM74LS194AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS194AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Function Table Mode Clear Clock HIGH Level (steady state) L ...

Page 3

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...

Page 4

Switching Characteristics and Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PHL HIGH-to-LOW ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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