dm74ls109a Fairchild Semiconductor, dm74ls109a Datasheet

dm74ls109a

Manufacturer Part Number

dm74ls109a

Description

Dual Positive-edge-triggered J-k Flip-flop With Preset, Clear, And Complementary Outputs

Manufacturer

Fairchild Semiconductor

Datasheet

1.DM74LS109A.pdf (5 pages)

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DM74LS109AM

DM74LS109AN

DM74LS109A

Dual Positive-Edge-Triggered J-K Flip-Flop with

Preset, Clear, and Complementary Outputs

General Description

This device contains two independent positive-edge-trig-

gered J-K flip-flops with complementary outputs. The J and

K data is accepted by the flip-flop on the rising edge of the

clock pulse. The triggering occurs at a voltage level and is

not directly related to the transition time of the rising edge

of the clock. The data on the J and K inputs may be

changed while the clock is HIGH or LOW as long as setup

and hold times are not violated. A low logic level on the

preset or clear inputs will set or reset the outputs regard-

less of the logic levels of the other inputs.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Order Number

Package Number

M16A

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DS006368

Function Table

established.

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each active transition of the clock pulse.

Note 1: This configuration is nonstable; that is, it will not persist when pre-

set and/or clear inputs return to their inactive (HIGH) state.

LOW Logic Level

Rising Edge of Pulse

Either LOW or HIGH Logic Level

HIGH Logic Level

The output logic level of Q before the indicated input conditions were

Package Description

Each output changes to the complement of its previous level on

CLR

Inputs

CLK

June 1986

Revised March 2000

H (Note 1) H (Note 1)

www.fairchildsemi.com

Outputs

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dm74ls109a Summary of contents

Page 1

... Package Number DM74LS109AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS109AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...

Page 3

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter V Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage V ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow www.fairchildsemi.com Package Number M16A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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