dm74ls469 National Semiconductor Corporation, dm74ls469 Datasheet

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dm74ls469

Manufacturer Part Number
dm74ls469
Description
8-bit Up/down Counter
Manufacturer
National Semiconductor Corporation
Datasheet
C 1995 National Semiconductor Corporation
DM54LS469 DM74LS469 8-Bit Up Down Counter
General Description
The ‘LS469 is an 8-bit synchronous up down counter with
parallel load and hold capability Three function-select in-
puts (LD UD CBI) provide one of four operations which
occur synchronously on the rising edge of the clock (CK)
The LOAD operation loads the inputs (D
put register (Q
ous value regardless of clock transitions The INCREMENT
operation adds one to the output register when the carry-in
input is TRUE (CBI
HOLD The carry-out (CBO) is TRUE (CBO
the output register (Q
(CBO
from the output register when the borrow-in input is TRUE
(CBI
row-out (CBO) is TRUE (CBO
ister (Q
Connection Diagram
Function Table
TRI-STATE is a registered trademark of National Semiconductor Corp
e
e
LOW) otherwise the operation is a HOLD The bor-
7
HIGH) The DECREMENT operation subtracts one
– Q
See NS Package Number J24F or N24C
0
) is all LOWs otherwise FALSE (CBO
DM74LS469J or DM74LS469N
7
Order Number DM54LS469J
– Q
0
) The HOLD operation holds the previ-
e
7
LOW) otherwise the operation is a
– Q
Top View
0
) is all HIGHs otherwise FALSE
TL L 8333
e
LOW) when the output reg-
OE CK LD UD CBI D7 – D0
H
L
L
L
L
L
u
u
u
u
u
X
7
– D
X
H
H
H
H
L
0
e
) into the out-
H
H
X
X
L
L
LOW) when
TL L 8333 – 1
e
H
H
X
X
L
L
HIGH)
X
D
X
X
X
X
The output register (Q
and disabled (HI-Z) when OE is HIGH The output drivers
will sink the 24 mA required for many bus-interface stan-
dards Two or more ‘LS469 octal up down counters may be
cascaded to provide larger counters
Features Benefits
Y
Y
Y
Y
Y
Y
Y
Standard Test Load
Q minus 1 DECREMENT
8-bit up down counter for microprogram-counter DMA
controller and general-purpose counting applications
8 bits matches byte boundaries
Bus-structured pinout
24-pin SKINNYDIP saves space
TRI-STATE outputs drive bus lines
Low current PNP inputs reduce loading
Expandable in 8-bit increments
Q plus 1
Q7 – Q0
D
Q
Q
Z
INCREMENT
Operation
LOAD
HOLD
HOLD
HI-Z
7
– Q
0
) is enabled when OE is LOW
RRD-B30M115 Printed in U S A
TL L 8333 – 3
July 1989

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dm74ls469 Summary of contents

Page 1

... DM54LS469 DM74LS469 8-Bit Up Down Counter General Description The ‘LS469 is an 8-bit synchronous up down counter with parallel load and hold capability Three function-select in- puts (LD UD CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK) The LOAD operation loads the inputs (D ...

Page 2

Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage V CC Input Voltage Operating Conditions Symbol Parameter V Supply Voltage CC T Operating Free-Air Temperature ...

Page 3

Logic Diagram LS469 TL L 8333 – ...

Page 4

... Physical Dimensions inches (millimeters) 24-Pin Narrow Ceramic Dual-In-Line Package (J) Order Number DM54LS469J or DM74LS469J 24-Pin Narrow Plastic Dual-In-Line Package (N) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL ...

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