74alvc74bq NXP Semiconductors, 74alvc74bq Datasheet - Page 9

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74alvc74bq

Manufacturer Part Number
74alvc74bq
Description
Dual D-type Flip-flop With Set And Reset; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Note
1. All typical values are measured at T
AC WAVEFORMS
2003 May 26
handbook, full pagewidth
f
SYMBOL
max
Dual D-type flip-flop with set and reset;
positive-edge trigger
Fig.6
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
3.0 to 3.6 V
V
The clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nD to nCP set-up, the
nCP to nD hold times, the output transition times and the maximum clock pulse frequency.
CC
maximum clock pulse
frequency
PARAMETER
0.5
0.5
1.5 V
1.5 V
nCP input
nQ output
nQ output
nD input
V
V
V
CC
CC
M
GND
GND
V OH
V OH
V OL
V OL
V I
V I
amb
V
V
2.7 V
2.7 V
CC
CC
see Figs 6 and 8
V
= 25 C.
I
V M
INPUT
t PLH
t su
OTHER
TEST CONDITIONS
2.0 ns
2.0 ns
2.5 ns
2.5 ns
t
r
= t
t h
V M
f
9
V M
t W
V M
t PHL
1/f max
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
V
CC
t PHL
(V)
t su
t h
150
200
250
300
MIN.
t PLH
MNA422
275
325
375
425
TYP.
(1)
Product specification
74ALVC74
MAX.
MHz
MHz
MHz
MHz
UNIT

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