DM74ALS174MX Fairchild Semiconductor, DM74ALS174MX Datasheet
DM74ALS174MX
Specifications of DM74ALS174MX
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DM74ALS174MX Summary of contents
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... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams DM74ALS174 © 2000 Fairchild Semiconductor Corporation Features Advanced oxide-isolated ion-implanted Schottky TTL process Pin and functional compatible with LS family counterpart ...
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Function Table Clear HIGH Level (steady state) L LOW Level (steady state) X Don’t Care Transition from LOW-to-HIGH Level Q the level of Q before the indicated steady-state input conditions were established 0 Note 1: ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input ...
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Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at V Symbol Parameter V Input Clamp Voltage HIGH Level Output Voltage LOW Level OL V ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16D 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...