fxl4td245 Fairchild Semiconductor, fxl4td245 Datasheet

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fxl4td245

Manufacturer Part Number
fxl4td245
Description
Fxl4td245 Low Voltage Dual Supply 4-bit Signal Translator With Configurable Voltage Supplies And Signal Levels And 3-state Outputs And Independent Direction Controls
Manufacturer
Fairchild Semiconductor
Datasheet

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©2006 Fairchild Semiconductor Corporation
FXL4TD245 Rev. 1.0.4
FXL4TD245
Low Voltage Dual Supply 4-Bit Signal Translator with
Configurable Voltage Supplies and Signal Levels and 3-STATE
Outputs and Independent Direction Controls
Features
Ordering Information
Pb-Free package per JEDEC J-STD-020B.
Bi-directional interface between any 2 levels
from 1.1V to 3.6V
Fully configurable: Inputs track V
Non-preferential power-up sequencing;
either V
Outputs remain in 3-STATE until active V
reached
Outputs switch to 3-STATE if either V
Power-off protection
Control inputs (T/R
V
Packaged in 16-Terminal DQFN (2.5mm x 3.5mm)
ESD protections exceeds:
– 4kV HBM ESD
– 8kV HBM I/O to GND ESD
– 1kV CDM ESD (per ESD STM 5.3)
– 200V MM ESD (per JESD22-A115 & ESD STM5.2)
Order Number
FXL4TD245BQX
CCA
(per JESD22-A114 & Mil Std 883e 3015.7)
(per JESD22-A114 & Mil Std 883e 3015.7)
voltage
CC
may be powered-up first
n
, OE) levels are referenced to
Package Number
MLP016E
CC
level
CC
is at GND
CC
level is
Pb-Free
Yes
General Description
The FXL4TD245 is a configurable 4-bit dual-voltage-
supply translator designed for both uni-directional and
bi-directional voltage translation between two logic lev-
els. The device allows translation between voltages as
high as 3.6V to as low as 1.1V. The A Port tracks the
allows for bi-directional voltage translation over a variety
of voltage levels: 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.
The device remains in 3-STATE until both V
Internal power down control circuits place the device in
3-STATE if either V
The Transmit/Receive (T/R) inputs independently deter-
mine the direction of data through each of the four bits.
The OE input, when HIGH, disables both the A and B
FXL4TD245 is designed so that the control pins (T/R and
active levels allowing either V
OE) are supplied by V
16-Terminal Depopulated Quad Very-Thin Flat Pack,
No Leads (DQFN), JEDEC MO-241, 2.5mm x 3.5mm
V
Ports by placing them in a 3-STATE condition. The
CCA
level, and the B Port tracks the V
Package Description
CC
is removed.
CCA
.
CC
to be powered-up first.
CCB
www.fairchildsemi.com
April 2007
CC
level. This
s reach
tm

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fxl4td245 Summary of contents

Page 1

... The Transmit/Receive (T/R) inputs independently deter- mine the direction of data through each of the four bits. The OE input, when HIGH, disables both the A and B Ports by placing them in a 3-STATE condition. The FXL4TD245 is designed so that the control pins (T/R and OE) are supplied by V Pb-Free Yes 16-Terminal Depopulated Quad Very-Thin Flat Pack, No Leads (DQFN), JEDEC MO-241, 2 ...

Page 2

... T GND OE (Top View) Pin Assignment Pin Number Terminal Name 1 2 3– 11– ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 Pin Descriptions Pin Names V CCB OE T 0-3 CCA V CCB Truth Table OE T ...

Page 3

... T Free Air Operating Temperature A ∆t /∆V Maximum Input Edge Rate V Notes Absolute Maximum Rating must be observed All unused inputs and I/O pins must be held at V ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 Parameter , OE < (2) Parameter , OE) ...

Page 4

... OL (4) Voltage Input Leakage V I Current. Control Pins ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 V (V) Conditions CCI , B 2.7–3 2.3–2.7 1.65–2.3 1.4–1.65 1.1–1.4 2.7–3 CCA 2.3–2.7 1.65–2.3 1.4–1.65 1.1–1 2.7–3 2.3–2.7 1.65–2.3 1.4– ...

Page 5

... CCI CC = the associated with the output under test. CCO CC 5. Don't Care = Any valid logic level. 6. Reflects current per supply, V CCA ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 (Continued) V (V) Conditions CCI = ...

Page 6

... PLH PHL Propagation Delay Output Enable PZH PZL Output Enable Output Disable PHZ PLZ Output Disable ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 = −40°C to +85° CCB = = V V 1.65V to CCB CCB 3.0V to 3.6V 2.3V to 2.7V 1.95V Min ...

Page 7

... Output Disable PHZ PLZ Output Disable Capacitance Symbol Parameter C Input Capacitance Control Pins (OE, T/ Input/Output Capacitance A I/O C Power Dissipation Capacitance PD ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 (Continued) = −40°C to +85° CCB = = V V 1.65V to CCB CCB 3.0V to 3.6V 2.3V to 2.7V 1.95V Min ...

Page 8

... CCO − For for Control Pins T/R and OE CCI CCA ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0 Rtr1 DUT Test Switch , t OPEN PLH PHL = 3.3 ± 0.3V, 2.5V ± 0.2V CCO CCO , t PLZ PZL 1.8V ± ...

Page 9

... Tape and Reel Specification Tape Format for DQFN 10 Package Designator Section BQX Leader (Start End) Trailer (Hub End) Tape Dimensions millimeters ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 Tape Number Cavities 125 (typ) Carrier 2500/3000 75 (typ) 9 Cavity Cover Tape Status Status ...

Page 10

... Reel Dimensions inches (millimeters) Tape Size 13.0 (330) ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0 0.059 0.512 0.795 (1.50) (13.00) (20.20 7.008 0.488 0.724 (178) (12.4) (18.4) www.fairchildsemi.com ...

Page 11

... Physical Dimensions millimeters unless otherwise noted Figure 5. 6-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241 2.5 x 3.5mm ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 Package Number MLP016E 11 www.fairchildsemi.com ...

Page 12

... Datasheet Identification Product Status Advance Information Formative or In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2006 Fairchild Semiconductor Corporation FXL4TD245 Rev. 1.0.4 i-Lo™ Power-SPM™ PowerTrench ImpliedDisconnect™ Programmable Active Droop™ IntelliMAX™ ® QFET ISOPLANAR™ QS™ ...

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