24lcs21a Microchip Technology Inc., 24lcs21a Datasheet
24lcs21a
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24lcs21a Summary of contents
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... VCLK pulses while the SCL pin is idle. The 24LCS21A also enables the user to write-protect the entire memory array using its write-protect pin. The 24LCS21A is available in a standard 8-pin PDIP and SOIC package in industrial temperature range. DDC is a trademark of the Video Electronics Standards Assoc. ...
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... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................7.0V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature ...............................................................................................................................-65°C to +150°C Ambient temperature with power applied ................................................................................................-40°C to +125°C ESD protection on all pins ......................................................................................................................................................≥ † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...
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... Schmitt Trigger inputs which provide noise and specification for standard operation. I 24LCS21A Units Remarks kHz (Note 1) ns (Note 1) ns After this period the first clock pulse is generated ns Only relevant for repeated ...
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... FUNCTIONAL DESCRIPTION The 24LCS21A is designed to comply to the DDC ® Standard proposed by VESA (Figure 3-3) with the exception that it is not Access.bus™ capable. It oper- ates in two modes, the Transmit-Only mode and the Bidirectional mode. There is a separate 2-wire protocol to support each mode, each having a separate clock input but sharing a common data line (SDA) ...
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... The bus must be controlled by a master device that generates the Bidirectional mode clock (SCL), controls access to the bus and generates the Start and Stop conditions, while the 24LCS21A acts as the slave. Both master and slave can operate as transmitter or receiver, but the 2 C™ ...
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... VESA’s Display Data Channel (DDC) Standard Proposal ver. 2p rev. 0, used by permission of VESA. 2: The dash box and text “The 24LCS21A and... inside dash box.” are added by Microchip Technology Inc. 3: Vsync signal is normally used to derive a signal for VCLK pin on the 24LCS21A. ...
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... Note: Once switched into Bidirectional mode, the 24LCS21A will remain in that mode until power is removed. Removing power is the only way to reset the 24LCS21A into the Transmit-Only mode. 3.1.5 ACKNOWLEDGE Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte ...
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... After generating a Start condition, the bus master transmits the slave address consisting of a 7-bit device code (1010000) for the 24LCS21A. The eighth bit of slave address determines whether the master device wants to read or write to the 24LCS21A (Figure 3-7). The 24LCS21A monitors the bus for its corresponding slave address continuously ...
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... Page Write The write control byte, word address and the first data byte are transmitted to the 24LCS21A in the same way byte write. But instead of generating a Stop condition the master transmits up to eight data bytes to the 24LCS21A, which are temporarily stored in the on- chip page buffer and will be written into the memory after the master has transmitted a Stop condition ...
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... FIGURE 4-1: BYTE WRITE Bus Activity R Master T SDA Line S Bus Activity VCLK FIGURE 4-2: VCLK WRITE ENABLE TIMING SCL SDA IN VCLK T VHST DS21161H-page 10 Word Control Byte Address STA SU STO S T Data SPVL © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. FIGURE 5-1: Write Command Initiate Write Cycle Send Control Byte Word Data Address Data ( 24LCS21A ACKNOWLEDGE POLLING FLOW Send Send Stop Condition to Send Start with R Did Device Acknowledge (ACK = 0)? Yes Next Operation ...
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... Address Pointer is set. Then the master issues the control byte again, but with the R/W bit set to a one. The 24LCS21A will then issue an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the 24LCS21A discontinues transmission (Figure 7-2) ...
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... Sequential Read Sequential reads are initiated in the same way as a random read except that after the 24LCS21A transmits the first data byte, the master issues an acknowledge as opposed to a Stop condition in a random read. This directs the 24LCS21A to transmit the next sequentially addressed 8-bit word (Figure 7-3) ...
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... WP This pin is used for flexible write protection of the 24LCS21A. When the last memory location (7Fh) is written with any data, this pin is enabled and determines the write capability of the 24LCS21A (Table 6-1). DS21161H-page 14 ...
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... Revision F Corrections to Section 1.0, Electrical Characteristics. Revision G Revised Section 8.4; Added On-Line Support page. Revision H Features Section - Add Pb-free and remove Commer- cial Temp; Revised Description; Table 1-1, Remove Commercial Temp, Revised Input/Output conditions; Revise Product ID section. © 2007 Microchip Technology Inc. 24LCS21A DS21161H-page 15 ...
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... To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office PART NO. X /XX Device Temperature Package Range Device: 24LCS21A Dual Mode I2C Serial EEPROM 24LCS21AT Dual Mode I2C Serial EEPROM (Tape and Reel) Temperature I = -40°C to +85°C Range: Package Plastic DIP (300 mil Body), 8-lead ...
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... Customers representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com 24LCS21A should contact their distributor, DS21161H-page 17 ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 24LCS21A Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. © 2007 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, K ...
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... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris ...